SLVUCN3 March   2023 TPS61033

 

  1.   TPS61033EVM-105 Evaluation Module
  2.   Trademarks
  3. 1Introduction
    1. 1.1 Performance Specification
    2. 1.2 Modification
    3. 1.3 Input Capacitor
    4. 1.4 Inductor
    5. 1.5 Output Capacitor
    6. 1.6 Feedforward Capacitor
  4. 2Setup
    1. 2.1 Input/Output Connector Descriptions
  5. 3Schematic and Bill of Materials
    1. 3.1 Schematic
    2. 3.2 Bill of Materials
  6. 4Board Layout

4 Board Layout

The PCB of the TPS61033EVM has four layers. Figure 4-1 and Figure 4-2 show the top side and bottom side of the PCB layout, respectively. Figure 4-3 and Figure 4-4 show the inner layer 1 and inner layer 2, respectively.

Figure 4-1 Top-Side Layout
Figure 4-2 Bottom-Side Layout
Figure 4-3 Inner Layer 1 Layout
Figure 4-4 Inner Layer 2 Layout