SLVUCS2A August   2024  – September 2024 TPS25763-Q1

 

  1.   1
    1. 1.1 Trademarks
  2.   Description
  3.   Get Started
  4.   Features
  5.   Applications
  6.   7
  7. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  8. 2Hardware
    1. 2.1 EVM Connections
    2. 2.2 Setup
    3. 2.3 Header Information
    4. 2.4 Jumper Information
  9. 3Software
    1. 3.1 Software Description
  10. 4Additional Information
    1. 4.1 Known Hardware or Software Limitations
  11. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  12. 6Revision History
  13. 7Trademarks

4.1 Known Hardware or Software Limitations

USB 2.0 MUX Disabled

TS3USB221A-Q1 USB 2.0 data MUX /OE pin is misconfigured. This prevents legacy charge handshakes and firmware updates over the Type-C port from working as intended. To fix this, short the bottom pad of R41 (/OE) to the top pad of C58 (GND).

TPS25763Q1EVM TS3USB221A-Q1 /OE Input CorrectionFigure 4-1 TS3USB221A-Q1 /OE Input Correction

Dual Role Power (DRP) Circuit

When configured as a DRP system, a 100Ω resistor must be placed in parallel with the NFET load switch between CSN/OUT and the Type-C receptacle. The required resistance is 100Ω with ±5% tolerance and 0.25W rating. This resistor can be installed by the user as R8 on the EVM.

TPS25763Q1EVM DRP Simplified Bypass Resistor CircuitFigure 4-2 DRP Simplified Bypass Resistor Circuit

J2 IRQ2 Silk Screen Error

The silk screen label for pin 1 of J2 is mislabeled and reads IRQ2.

TPS25763Q1EVM J2 IRQ2 Silk Screen ErrorFigure 4-3 J2 IRQ2 Silk Screen Error

J8 Silk Screen Error

The silk screen label for EEPROM and TSENSE are reversed. Onboard EEPROM I2C1 pullups are rows 3 and 4 (pins 5-6 and 7-8), TMP75B-Q1 I2C1 pullups are rows 1 and 2 (pins 1-2 and 3-4).

TPS25763Q1EVM J8 Silk Screen ErrorFigure 4-4 J8 Silk Screen Error