SLVUCT3 December   2023 TPS56A37

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Modifications
      1. 2.1.1 Output Voltage Setpoint
      2. 2.1.2 Adjustable UVLO
  8. 3Implementation Results
    1. 3.1 Test Setup and Results
      1. 3.1.1 Input, Output Connections
      2. 3.1.2 Start-Up Procedure
      3. 3.1.3 Output Voltage Ripple
      4. 3.1.4 Start-Up
      5. 3.1.5 Shutdown
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
    3. 4.3 Bill of Materials
  10. 5Additional Information
    1.     Trademarks
  11. 6Reference

PCB Layout

This section provides a description of the TPS56A37EVM, board layout, and layer illustrations.

The board images are shown in Figure 4-2 and Figure 4-3. The board layouts are shown in Figure 4-4 to Figure 4-8. The top layer contains the main power traces for VIN, VOUT, and ground. Also on the top layer are connections for the pins of the TPS56837 and a large area filled with power ground (PGND). Most of the signal traces are also located on the top side. The input decoupling capacitors, C1, C2, and C3 are located as close to the IC as possible. The input and output connectors, test points, and all of the components are located on the top side. Middle layer 1, Middle layer 2, and the bottom layer are predominantly PGND planes. Analog ground (AGND) area is provided on Middle layer 1. Figure 4-6 shows the AGND and PGND are connected at a single point on the Middle layer 1. The bottom layer contains the output voltage feedback trace, the connection to the VIN pin of the EN control, and the connections of test points.

GUID-20231207-SS0I-BT6P-GH4D-CKZBWLCQW7MS-low.svgFigure 4-2 TPS56A37EVM Front Photo
GUID-20221206-SS0I-Z1L4-SHGG-SFXFMCGPWFLQ-low.svgFigure 4-4 Top Assembly
GUID-20221206-SS0I-2CJV-BKLT-KJF2J8HXRKDC-low.svgFigure 4-6 Middle Layer 1
GUID-20221206-SS0I-RV4J-KCMQ-QMSCNKP1F9R2-low.svgFigure 4-8 Bottom Layer
GUID-20231207-SS0I-Z2PM-7C1J-39KLBCWGD7TN-low.svgFigure 4-3 TPS56A37EVM Back Photo
GUID-20221206-SS0I-GBVP-QDF0-LVP4G9QMT3HP-low.svgFigure 4-5 Top Layer
GUID-20221206-SS0I-FW3W-ZTMS-6QHXL3CPCBRX-low.svgFigure 4-7 Middle Layer 2