SLVUCY3 October   2024 LM65680-Q1

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Test Setup and Procedure
      1. 2.1.1 EVM Connections
      2. 2.1.2 Test Equipment
      3. 2.1.3 Recommended Test Setup
        1. 2.1.3.1 Input Connections
        2. 2.1.3.2 Output Connections
      4. 2.1.4 Test Procedure
        1. 2.1.4.1 Line, Load Regulation, and Efficiency
  8. 3Implementation Results
    1. 3.1 Performance Data and Results
      1. 3.1.1 EVM Characteristics
      2. 3.1.2 Conversion Efficiency
      3. 3.1.3 Operating Waveforms
        1. 3.1.3.1 Switching
        2. 3.1.3.2 Load Transient Response
        3. 3.1.3.3 Short-Circuit Recovery
        4. 3.1.3.4 Start-Up and Shutdown With EN
        5. 3.1.3.5 Start-Up With VIN
      4. 3.1.4 Bode Plot
      5. 3.1.5 CISPR 25 EMI Performance
      6. 3.1.6 Thermal Performance
  9. 4Hardware Design Files
    1. 4.1 Schematic
    2. 4.2 PCB Layout
      1. 4.2.1 Component Drawings
      2. 4.2.2 Multi-Layer Stackup
    3. 4.3 Bill of Materials
  10. 5Compliance Information
    1. 5.1 Compliance and Certifications
  11. 6Related Documentation
    1. 6.1 Supplemental Content
      1. 6.1.1 Development Support
      2. 6.1.2 PCB Layout Resources
      3. 6.1.3 Thermal Design Resources
  12. 7Additional Information
    1. 7.1 Trademarks

1.1 Introduction

The LM65680-Q1EVM uses the LM65680-Q1 synchronous buck converter IC with input voltage range up to 70V and output current up to 8A. The default evaluation module (EVM) features an output voltage that is set to 5V adjustable and a switching frequency of 400kHz.

The design supports adjustable input voltage UVLO for application-specific power-up and power-down requirements, external clock synchronization to mitigate beat frequencies in noise-sensitive applications, power good (PG) indicator for sequencing and output voltage monitoring, pin-selectable dual random spread spectrum (DRSS) control for electromagnetic interference (EMI) mitigation, pin selectable MODE control for light-load performance (pulsed frequency modulation - PFM) with AUTO mode or fixed switching frequency with forced pulsed width modulation (FPWM) mode, pin selectable COMP feature for internal or external compensation, and soft start (SS) feature to extend the soft-start time.

The LM65680-Q1 synchronous buck converter used in the EVM has the following features:

  • Wide input voltage (wide VIN) range of 3V to 70V
  • Dual random spread spectrum (DRSS) modulation for lower EMI
  • Wide duty cycle range with low tON(min) and tOFF(min)
  • Ultra-low shutdown and no-load standby quiescent currents
  • Multiphase capability
  • Peak current-mode control loop architecture
  • Integrated, high-current MOSFETs
  • Cycle-by-cycle overcurrent protection with hiccup