SLVUD41 December   2024 TPS65219

 

  1.   1
  2.   ABSTRACT
  3.   Trademarks
  4. 1Introduction
  5. 2EEPROM Device Settings
    1. 2.1  Device ID
    2. 2.2  Enable Settings
    3. 2.3  Regulator Voltage Settings
    4. 2.4  Power Sequence Settings
      1. 2.4.1 Power Sequence Settings - Slot assignments
      2. 2.4.2 Power Sequence Settings - Slot Durations
      3. 2.4.3 TPS6521901 Sequence and Power Block Diagram
    5. 2.5  EN / PB / VSENSE Settings
    6. 2.6  Multi-Function Pin Settings
    7. 2.7  Over-Current Deglitch
    8. 2.8  Mask Settings
    9. 2.9  Discharge Check
    10. 2.10 Multi PMIC Config
  6. 3Revision History

2.4.3 TPS6521901 Sequence and Power Block Diagram

TPS6521901 Power-Up SequenceFigure 2-1 TPS6521901 Power-Up Sequence
TPS6521901 Power-Down SequenceFigure 2-2 TPS6521901 Power-Down Sequence
TPS6521901 Example Power Block DiagramFigure 2-3 TPS6521901 Example Power Block Diagram