SLWU087E november   2013  – june 2023

 

  1.   1
  2.   High Speed Data Converter Pro GUI
  3.   Trademarks
  4. 1 Introduction
  5. 2 Software Start up
    1. 2.1 Installation Instructions
    2. 2.2 USB Interface and Drivers
    3. 2.3 Device ini Files
  6. 3 User Interface
    1. 3.1 Toolbar
      1. 3.1.1 File Options
        1. 3.1.1.1 User Profiles
        2. 3.1.1.2 Resize Window
      2. 3.1.2 Instrument Options
        1. 3.1.2.1 TSW14J56 and High Speed Data Converter (HSDC) Pro Eye Quality Analysis
        2. 3.1.2.2 IO Delay
        3. 3.1.2.3 JESD204B Error Injection
        4. 3.1.2.4 FPGA Registers Write Read
      3. 3.1.3 Data Capture Option
        1. 3.1.3.1 Capture Option
        2. 3.1.3.2 Trigger Option
        3. 3.1.3.3 Using Multiple TSW14xxx and ADC EVM’s for Simultaneous Capture using Trigger Option
          1. 3.1.3.3.1 Hardware Setup
          2. 3.1.3.3.2 Setting up the Slave Board
          3. 3.1.3.3.3 Setting up the Master Board
          4. 3.1.3.3.4 Read Captured Memory from the Slave Board
      4. 3.1.4 Test Options
        1. 3.1.4.1  Notch Frequency Bins
        2. 3.1.4.2  2 Channel Display and Cursor Lock
        3. 3.1.4.3  Analysis Window Markers
        4. 3.1.4.4  X-Scale in Time
        5. 3.1.4.5  Y-Scale in Voltage
        6. 3.1.4.6  Other Frequency Options
        7. 3.1.4.7  NSD Marker
        8. 3.1.4.8  Phase Plot
        9. 3.1.4.9  Phase in Degree
        10. 3.1.4.10 Histogram
        11. 3.1.4.11 Disable User Popups
        12. 3.1.4.12 HSDC Pro Lite Version
      5. 3.1.5 Help
    2. 3.2 Status Windows
    3. 3.3 Mode Selection
    4. 3.4 Device Selection
    5. 3.5 Skip Configuration
    6. 3.6 Capture Button (ADC Mode Only)
    7. 3.7 Test Selection (ADC Mode only)
      1. 3.7.1 Single Tone FFT
        1. 3.7.1.1 Parameter Controls
        2. 3.7.1.2 ADC Captured Data Display Pane
        3. 3.7.1.3 FFT Power Spectrum
        4. 3.7.1.4 Overlay Unwrap Waveform
        5. 3.7.1.5 Single Tone FFT Statistics
      2. 3.7.2 Multi Channel Display
      3. 3.7.3 Unit Selection
      4. 3.7.4 Time Domain
      5. 3.7.5 Two Tone
      6. 3.7.6 Channel Power
    8. 3.8 DAC Display Panel (DAC Mode only)
      1. 3.8.1 Send Button (DAC Mode Only)
      2. 3.8.2 Load File to Transfer into TSW14xxx Button
      3. 3.8.3 Parameter Controls
    9. 3.9 I/Q Multi-Tone Generator
  7. 4 ADC Data Capture Software Operation
    1. 4.1 Testing a TSW1400 EVM with an ADS5281 EVM
    2. 4.2 Testing a TSW1400EVM with an ADS62P49EVM (CMOS Interface)
  8. 5 TSW1400 Pattern Generator Operation
    1. 5.1 Testing a TSW1400 EVM with a DAC3152 EVM
    2. 5.2 Loading DAC Firmware
    3. 5.3 Configuring TSW1400 for Pattern Generation
    4. 5.4 Testing a TSW1400 EVM with a DAC5688EVM (CMOS Interface)
  9. 6 TSW14J58 Functional Description
    1. 6.1 Testing the TSW14J58 EVM with an ADC12DJ3200 EVM
  10. 7 TSW14J57 Functional Description
    1. 7.1 Testing the TSW14J57 EVM with an ADC34J45 EVM
  11. 8 TSW14J56 Functional Description
    1. 8.1 Testing the TSW14J56 EVM with an ADC34J45 EVM
  12. 9 TSW14J50 Functional Description
    1. 9.1 Device Selection
  13. 10TSW14J10 Functional Description
    1. 10.1 DAC and ADC GUI Configuration File Changes When Using a Xilinx Development Platform
    2. 10.2 DAC38J84EVM GUI Setup Example
  14.   A Signal Processing in High Speed Data Converter Pro
    1.     A.1 Introduction
    2.     A.2 FFT Calculation from Time Domain Data
      1.      A.2.1 FFT Window Correction Factor
    3.     A.3 FFT Filtering
    4.     A.4 Single Tone Parameters
      1.      A.4.1 Number of Neighboring Bins for each FFT Window
    5.     A.5 Fundamental Power
      1.      A.5.1 Harmonic Distortions
      2.      A.5.2 SNR
      3.      A.5.3 SFDR
      4.      A.5.4 THD
      5.      A.5.5 SINAD
      6.      A.5.6 ENOB
      7.      A.5.7 Next Spur
    6.     A.6 Two Tone Parameters
    7.     A.7 Average FFT Calculation
    8.     A.8 NSD Calculation
  15.   B History Notes
  16.   C Revision History

3.7.1.1 Parameter Controls

The output data rate is entered in the ADC Output Data Rate text box. In most cases this value will be the same as the sample rate of the ADC. For parts that support decimation, this value is usually lower. For example, this number is usually 2x lower if the part decimates by 2 and 4x lower if it decimates by 4. The number is entered in Hertz (Hz), although the letter M may be appended to represent the sampling rate in MHz.

For example, 125M = 125 MHz or 125,000,000 Hz.

The expected input frequency is entered in the ADC Input Target Frequency text box. If the Auto Calculation of Coherent Input Frequency mode is enabled, then this input frequency is adjusted up or down slightly away from the input frequency automatically. If coherent input frequency is required, the signal generator used to source the input frequency must be set to this exact calculated coherent frequency. The coherent frequency calculation takes the ADC sampling rate, the input frequency as entered by the user in Hertz, and the FFT record length and adjusts the input frequency so that the captured data starts and ends on the same place of the sine wave of the input frequency. This avoids an artifact of the FFT calculation from presenting a smeared power spectrum due to the fact that the FFT presumes the sample of the input is part of a continuous input signal. If the input and sampling frequency is not coherent, and the sampled data is appended end to end to form a continuous input signal, then there is an apparent phase discontinuity at the beginning and the end of the sampled data. Making the sampling and input frequencies coherent avoids this apparent discontinuity. If the input frequency cannot be made coherent, then the windowing functions other than Rectangular can be used to process out this effect to some degree.

The FFT record length can be set in the Analysis Window (samples) text box. The TSW1400 and TSW14J5x EVMs support FFT analysis lengths of as much as 524,288 samples, or as little as 1024 samples. In order to analyze the ADC Samples over a particular section of capture length, set the required “Analysis Window (samples)” appropriately and move the green cursor over the length of the context plot graph to include the desired section of ADC capture data to be considered for analysis. The red vertical line shown in the codes graph represents where the last sample is used from the captured data for analysis. The GUI will only allow record lengths that are the same size or smaller than the number of captured samples, which is set by the value in the capture option under the Data Capture Options tab (See Section 3.1.3.1). The default value is 65,536.

GUID-91541871-14CC-468D-B532-2DC21FB8EC83-low.png Figure 3-30 Test Parameters

Clicking on the Settings button (a gear) near the ‘ADC Output Data Rate’ opens a window as shown in Figure 3-31, which allows the user to specify the additional device parameters. Check “Enable” to enable this option.

GUID-20210330-CA0I-VDZZ-HSKQ-1CMBTTGXP4D1-low.png Figure 3-31 Additional Device Parameters

This additional setting is used to calculate the exact location of the spurs in the captured tone based on the following device parameters:

ADC Sampling Rate – Actual ADC sampling rate from the device. The ADC Output Data Rate value displayed in Figure 3-30 will be (Actual ADC Sampling Rate / Decimation).

ADC Input Target Frequency – Actual signal frequency on the device input.

ADC 2nd Input Target Frequency – Actual signal frequency on the second device input.

NCO – NCO frequency configured in the device that goes to the mixer. The NCO frequency provides a frequency shift of specified frequency value to the input tone. The spur search algorithm in HSDC Pro will account for this and identify the spurs properly.

# of NCO Bits – Number of NCO accuracy bits used in adjusting the user specified NCO frequency. To include the same amount in the calculation of NCO frequency, check on the “Use # NCO Bits?” The formula used to modify the User Specified NCO Frequency, based on the number NCO accuracy bits is given below. In order to use the # of NCO Bits, the “Auto Calc of Coherent Frequencies” should be enabled.

GUID-20210414-CA0I-8C8K-CTRN-C0SC0WNFCLLK-low.png

Decimation – Specifies the Decimation mode configured in the device.

Remember for this session – This will save the test parameter settings in case the board is disconnected or switched.