SLWU087E november   2013  – june 2023

 

  1.   1
  2.   High Speed Data Converter Pro GUI
  3.   Trademarks
  4. 1 Introduction
  5. 2 Software Start up
    1. 2.1 Installation Instructions
    2. 2.2 USB Interface and Drivers
    3. 2.3 Device ini Files
  6. 3 User Interface
    1. 3.1 Toolbar
      1. 3.1.1 File Options
        1. 3.1.1.1 User Profiles
        2. 3.1.1.2 Resize Window
      2. 3.1.2 Instrument Options
        1. 3.1.2.1 TSW14J56 and High Speed Data Converter (HSDC) Pro Eye Quality Analysis
        2. 3.1.2.2 IO Delay
        3. 3.1.2.3 JESD204B Error Injection
        4. 3.1.2.4 FPGA Registers Write Read
      3. 3.1.3 Data Capture Option
        1. 3.1.3.1 Capture Option
        2. 3.1.3.2 Trigger Option
        3. 3.1.3.3 Using Multiple TSW14xxx and ADC EVM’s for Simultaneous Capture using Trigger Option
          1. 3.1.3.3.1 Hardware Setup
          2. 3.1.3.3.2 Setting up the Slave Board
          3. 3.1.3.3.3 Setting up the Master Board
          4. 3.1.3.3.4 Read Captured Memory from the Slave Board
      4. 3.1.4 Test Options
        1. 3.1.4.1  Notch Frequency Bins
        2. 3.1.4.2  2 Channel Display and Cursor Lock
        3. 3.1.4.3  Analysis Window Markers
        4. 3.1.4.4  X-Scale in Time
        5. 3.1.4.5  Y-Scale in Voltage
        6. 3.1.4.6  Other Frequency Options
        7. 3.1.4.7  NSD Marker
        8. 3.1.4.8  Phase Plot
        9. 3.1.4.9  Phase in Degree
        10. 3.1.4.10 Histogram
        11. 3.1.4.11 Disable User Popups
        12. 3.1.4.12 HSDC Pro Lite Version
      5. 3.1.5 Help
    2. 3.2 Status Windows
    3. 3.3 Mode Selection
    4. 3.4 Device Selection
    5. 3.5 Skip Configuration
    6. 3.6 Capture Button (ADC Mode Only)
    7. 3.7 Test Selection (ADC Mode only)
      1. 3.7.1 Single Tone FFT
        1. 3.7.1.1 Parameter Controls
        2. 3.7.1.2 ADC Captured Data Display Pane
        3. 3.7.1.3 FFT Power Spectrum
        4. 3.7.1.4 Overlay Unwrap Waveform
        5. 3.7.1.5 Single Tone FFT Statistics
      2. 3.7.2 Multi Channel Display
      3. 3.7.3 Unit Selection
      4. 3.7.4 Time Domain
      5. 3.7.5 Two Tone
      6. 3.7.6 Channel Power
    8. 3.8 DAC Display Panel (DAC Mode only)
      1. 3.8.1 Send Button (DAC Mode Only)
      2. 3.8.2 Load File to Transfer into TSW14xxx Button
      3. 3.8.3 Parameter Controls
    9. 3.9 I/Q Multi-Tone Generator
  7. 4 ADC Data Capture Software Operation
    1. 4.1 Testing a TSW1400 EVM with an ADS5281 EVM
    2. 4.2 Testing a TSW1400EVM with an ADS62P49EVM (CMOS Interface)
  8. 5 TSW1400 Pattern Generator Operation
    1. 5.1 Testing a TSW1400 EVM with a DAC3152 EVM
    2. 5.2 Loading DAC Firmware
    3. 5.3 Configuring TSW1400 for Pattern Generation
    4. 5.4 Testing a TSW1400 EVM with a DAC5688EVM (CMOS Interface)
  9. 6 TSW14J58 Functional Description
    1. 6.1 Testing the TSW14J58 EVM with an ADC12DJ3200 EVM
  10. 7 TSW14J57 Functional Description
    1. 7.1 Testing the TSW14J57 EVM with an ADC34J45 EVM
  11. 8 TSW14J56 Functional Description
    1. 8.1 Testing the TSW14J56 EVM with an ADC34J45 EVM
  12. 9 TSW14J50 Functional Description
    1. 9.1 Device Selection
  13. 10TSW14J10 Functional Description
    1. 10.1 DAC and ADC GUI Configuration File Changes When Using a Xilinx Development Platform
    2. 10.2 DAC38J84EVM GUI Setup Example
  14.   A Signal Processing in High Speed Data Converter Pro
    1.     A.1 Introduction
    2.     A.2 FFT Calculation from Time Domain Data
      1.      A.2.1 FFT Window Correction Factor
    3.     A.3 FFT Filtering
    4.     A.4 Single Tone Parameters
      1.      A.4.1 Number of Neighboring Bins for each FFT Window
    5.     A.5 Fundamental Power
      1.      A.5.1 Harmonic Distortions
      2.      A.5.2 SNR
      3.      A.5.3 SFDR
      4.      A.5.4 THD
      5.      A.5.5 SINAD
      6.      A.5.6 ENOB
      7.      A.5.7 Next Spur
    6.     A.6 Two Tone Parameters
    7.     A.7 Average FFT Calculation
    8.     A.8 NSD Calculation
  15.   B History Notes
  16.   C Revision History

7.1 Testing the TSW14J57 EVM with an ADC34J45 EVM

This section describes the operation when testing with an ADC34J45 EVM that has a JESD204B output interface.

  • Power down the TSW14J57 if an ADC EVM is not installed.
  • Connect J17 of the ADC34J45 EVM to connector J2 of the TSW14J57.
  • Provide +5 VDC connection to J20 of the ADC34J45 EVM and +12 VDC connection to J16 of the TSW14J57 EVM.
  • Connect a USB 3.0 cable to J4 of the TSW14J57 EVM and a USB 2.0 cable to J18 of the ADC34J45 EVM.
  • Power up the TSW14J57 followed by the ADC EVM.
  • The TSW14J57 EVM connected to an ADC34J45 EVM is shown in Figure 7-6

GUID-20210712-CA0I-GSKP-Q4J4-0WVV0SKD3CM1-low.pngFigure 7-2 TSW14J57 EVM connected to an ADC34J45 EVM

Single Tone FFT Test

  1. The evaluation of the ADC34J45 EVM requires programming the LMK04828 clock source with the correct PLL settings to provide a 160 Msps clock.
    • Open the ADC3000 GUI, and connect to the ADC34J45 EVM
    • Go to the Low Level tab and click Load Config
    • Browse and find the ADC3xJxx_160MSPS_Operation_LMK_Setting.cfg
    • Check that the PLL2 LED D4 is lit on the ADC34J45 EVM – this indicates that the PLL is programmed properly and the correct clocks are being generated
  2. Start the HSDC Pro GUI program. When the program starts, select the ADC tab and then select ADC34J4x_LMF_442 device in the Select ADC drop-down menu as seen in Figure 7-7.
    GUID-D8AEAB4E-AF91-43EE-8405-2E1339FC0633-low.pngFigure 7-3 Select ADC34Jxx in the HSDC Pro GUI Program
  3. When prompted by Load ADC Firmware?, select YES
  4. Select Single Tone FFT Test under Test Selection
  5. Select the number of sample points (and resulting number of FFT bins) to be used. The example shown in Figure 7-8 has 65536 samples.
  6. Enter the ADC34J45 sampling rate. The example shown in Figure 7-8 has the sample rate set at 160 Msps
  7. Enter the input frequency desired. The example shown in Figure 7-8 has the filtered input frequency set at 25 MHz and approximately –1 dBFs on the HSDC Pro FFT plot
  8. Select channel 1, 2, 3, 4 depending on the channel to which the signal generator is connected
  9. Press the Capture button on the HSDC Pro GUI
  10. Observe an FFT result similar to that of Figure 7-8

GUID-9E6FC801-A9DE-4C86-9B38-6A58297D8C41-low.gifFigure 7-4 ADC34J45 Operating in 14-Bit Mode at 160 Msps with 25-MHz Input Signal

If the basic capture at this point is correct, then the front panel options of the ADC3000 SPI GUI and the front panel options of the High Speed Data Converter Pro GUI may be varied as desired to test out different device SPI options