SLWU094 March 2021
The TSW14J58 has 5 SMA connectors. Table 3-4 defines the connectors:
Component | Connector | Description |
---|---|---|
J12 | REFCLKP1 | Spare external FPGA reference clock+. Must install C527 and remove C552 to use this input. This connects to FPGA clock input ball H7 |
J13 | REFCLKN1 | Spare external FPGA reference clock–. Must install C528 and remove C553 to use this input. This connects to FPGA clock input ball H6 |
J31 | SYNCA | 3V3 CMOS logic SYNC output. J21 must have shunt installed between pins 1–2 to enable this output. This signal is sourced by FPGA ball J15. A shunt on pins 2–3 of J34 enables SYNCA LED. |
J32 | SYNCB | 3V3 CMOS logic SYNC output. J21 must have shunt installed between pins 1–2 to enable this output. This signal is sourced by FPGA ball G14. A shunt on pins 2–3 of J34 enables SYNCB LED. |
J36 | SYNCC | 3V3 CMOS logic SYNC output. J21 must have shunt installed between pins 1–2 to enable this output. This signal is sourced by FPGA ball G19. |
J33 | TRIG IN | 3V3 CMOS logic trigger input to FPGA pin G12. A shunt on pins 2–3 of J34 enables TRIG IN LED. |
SYNCA, SYNCB, and SYNCC SMAs are used to provide external SYNC signals from the FPGA. The cables of each SYNC signal should have equal length to ensure the signal arrives at the same time for all boards using these SYNCs. The TRIG IN SMA connector can be used to trigger the FPGA from an external source. All four SMAs use 3V3 logic CMOS signals. The EVM has onboard translators to set these inputs/outputs to the correct voltage levels for the FPGA.