SLYA042 July   2024 FDC1004 , FDC1004-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 CSAs and Input Bias Stage
  6. 3 CSA and Gain Error Factor
  7. 4 Applications for Resistance at Input Pins of Current Sense Amplifiers
    1. 4.1 Input Resistance Design Considerations
  8. 5 Applications for Input Resistance at Reference Pins of Current Sense Amplifiers
    1. 5.1 Bidirectional CSA and Applications
    2. 5.2 Driving CSA Reference Pin With High-Resistance Source Voltage
    3. 5.3 Input Resistance at Reference Pin Design Considerations
  9. 6 Design Procedure and Error Calculation for External Input Resistance on CSA
    1. 6.1 Calculating eEXT for INA185A4 With 110Ω Input Resistors
  10. 7 Design Procedure for Input Resistance on Capacitively-Coupled Current Sense Amplifier
    1. 7.1 Bench Verification of Input eEXT for Capacitively-Coupled Current Sense Amplifiers
  11. 8 Design Procedure for Input Resistance at CSA Reference Pins
  12. 9 Input Resistance Error Test with INA185 Over Temperature
    1. 9.1 Schematic
    2. 9.2 Methods
    3. 9.3 Theoretical Model
    4. 9.4 Data for INA185A4 with 110Ω Input Resistors
      1. 9.4.1 Data Calculations
    5. 9.5 Analysis
  13. 10Input Resistance Error Test with INA191 Over Temperature
    1. 10.1 Schematic
    2. 10.2 Methods
    3. 10.3 Theoretical Model
    4. 10.4 Data for INA191A4 With 2.2kΩ Input Resistors
      1. 10.4.1 Data Analysis
    5. 10.5 Analysis
  14. 11Derivation of VOS, EXT for a Single Stage Current Sense Amplifier (CSA)
  15. 12Summary
  16. 13References

5.2 Driving CSA Reference Pin With High-Resistance Source Voltage

Normally, the reference pins are driven with low-impedance (< 10Ω) voltage sources or buffers to prevent loading down the resistor feedback network. However, certain system applications can require external loading resistance as listed in Table 5-2.

Table 5-2 Applications for Driving Reference Pin with High-Resistance Source Voltage
Application TypeApplication Benefit
Using a resistor divider off a voltage supply rail (usually VS)Reduces system cost and BOM
Using an RC low-pass filter to reduce noise or overshoot of reference voltage sourceReduces measurement noise, especially for single-ended ADC measurements. Reduces capacitive loading onto the VREF source

Input resistance at device reference/bias pins can create significant single-ended error, but much of the error can be negated simply by measuring the differential output voltage (VOUT, differential), which is VOUT with respect to the reference pin (VREF), and/or performing a one-point system calibration. For a detailed analysis of the error generated from loading REF pins, refer to this Driving Voltage Reference Pins of Current-Sensing Amplifiers application note.