SLYS035A September   2022  – September 2023 TMAG5173-Q1

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Revision History
  6. 5 Pin Configuration and Functions
  7. 6 Specifications
    1. 6.1  Absolute Maximum Ratings
    2. 6.2  ESD Ratings
    3. 6.3  Recommended Operating Conditions
    4. 6.4  Thermal Information
    5. 6.5  Electrical Characteristics
    6. 6.6  Temperature Sensor
    7. 6.7  Magnetic Characteristics For A1, B1, C1, D1
    8. 6.8  Magnetic Characteristics For A2, B2, C2, D2
    9. 6.9  Magnetic Temp Compensation Characteristics
    10. 6.10 I2C Interface Timing
    11. 6.11 Power up Timing
    12. 6.12 Timing Diagram
    13. 6.13 Typical Characteristics
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 Magnetic Flux Direction
      2. 7.3.2 Sensor Location
      3. 7.3.3 Interrupt Function
      4. 7.3.4 Device I2C Address
      5. 7.3.5 Magnetic Range Selection
      6. 7.3.6 Update Rate Settings
    4. 7.4 Device Functional Modes
      1. 7.4.1 Standby (Trigger) Mode
      2. 7.4.2 Sleep Mode
      3. 7.4.3 Continuous Measure Mode
    5. 7.5 Programming
      1. 7.5.1 I2C Interface
        1. 7.5.1.1 SCL
        2. 7.5.1.2 SDA
        3. 7.5.1.3 I2C Read/Write
          1. 7.5.1.3.1 Standard I2C Write
          2. 7.5.1.3.2 General Call Write
          3. 7.5.1.3.3 Standard 3-Byte I2C Read
          4. 7.5.1.3.4 1-Byte I2C Read Command for 16-Bit Data
          5. 7.5.1.3.5 1-Byte I2C Read Command for 8-Bit Data
          6. 7.5.1.3.6 I2C Read CRC
      2. 7.5.2 Data Definition
        1. 7.5.2.1 Magnetic Sensor Data
        2. 7.5.2.2 Temperature Sensor Data
        3. 7.5.2.3 Angle and Magnitude Data Definition
        4. 7.5.2.4 Magnetic Sensor Offset Correction
    6. 7.6 TMAG5173-Q1 Registers
  9. 8 Application and Implementation
    1. 8.1 Application Information
      1. 8.1.1 Select the Sensitivity Option
      2. 8.1.2 Temperature Compensation for Magnets
      3. 8.1.3 Sensor Conversion
        1. 8.1.3.1 Continuous Conversion
        2. 8.1.3.2 Trigger Conversion
        3. 8.1.3.3 Pseudo-Simultaneous Sampling
      4. 8.1.4 Magnetic Limit Check
      5. 8.1.5 Magnetic Threshold Band Cross Detection
      6. 8.1.6 Error Calculation During Linear Measurement
      7. 8.1.7 Error Calculation During Angular Measurement
    2. 8.2 Typical Applications
      1. 8.2.1 Angle Measurement
        1. 8.2.1.1 Design Requirements
        2. 8.2.1.2 Detailed Design Procedure
          1. 8.2.1.2.1 Gain Adjustment for Angle Measurement
        3. 8.2.1.3 Application Curves
      2. 8.2.2 I2C Address Expansion
        1. 8.2.2.1 Design Requirements
        2. 8.2.2.2 Detailed Design Procedure
    3. 8.3 Best Design Practices
    4. 8.4 Power Supply Recommendations
    5. 8.5 Layout
      1. 8.5.1 Layout Guidelines
      2. 8.5.2 Layout Example
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Mechanical, Packaging, and Orderable Information
7.5.1.3.3 Standard 3-Byte I2C Read

Figure 7-9 and Figure 7-10 show examples of standard I2C three byte read command supported by the TMAG5173-Q1. The starting byte contains 7-bit secondary device address and the R/W command bit '0'. The MSB of the second byte contains the conversion trigger command bit. Writing '1' at this trigger bit will start a new conversion after the register address decoding is completed. The 7 LSB bits of the second byte contains the starting register address for the write command. After receiving ACK signal from secondary, the primary send the secondary address once again with R/W command bit as '1'. The secondary starts to send the corresponding register data. It will send successive register data with each successive ACK from primary. If CRC is enabled, the secondary will send the fifth CRC byte based off the CRC calculation of immediate past 4 register bytes.

Note: In the standard 3-byte read command the TMAG5173-Q1 doesn't support CRC if the data length is more than 4 byte. Initiate successive read commands for larger data stream requiring CRC.

TMAG5173-Q1 Standard 3-Byte I2C Read With CRC Disabled, CRC_EN = 0b Figure 7-9 Standard 3-Byte I2C Read With CRC Disabled, CRC_EN = 0b
TMAG5173-Q1 Standard 3-Byte I2C Read With CRC Enabled, CRC_EN = 1b Figure 7-10 Standard 3-Byte I2C Read With CRC Enabled, CRC_EN = 1b