2 Conclusion

Applications including ADC input and ADC reference voltage drivers require the op-amp circuit to respond to both output load and input step transients. The R_iso+DFB circuit topology often used in these applications can have large differences in the output settling response times between output and input steps, depending on the selected circuit values and ratios. If you only perform circuit analysis using input steps when designing these circuits, unexpected results for output load settling may negatively impact the application. Therefore, when designing circuits that must respond to both input step transients and output load transients, it is good practice to verify that the settling response to both transient types meets the circuit settling requirements.