3 Compensation schemes

There are cases where it is not possible to reduce a capacitor on the output of an op amp, for either voltage rail regulation, filter capacitance for an analog-to-digital converter, or other circuit needs. In such cases, how do you achieve proper phase margin? There are multiple compensation schemes that can increase phase margin, but in this article, I’ll focus on two, shown in Figure 3 and Figure 4: an isolation resistor (Riso) and Riso dual feedback. When designing these circuits, it can be difficult to determine what value of Riso you need to stabilize the feedback loop.

Figure 3 Riso compensation scheme.

Figure 4 Riso dual feedback scheme.

Riso is the simplest method for isolating the phase lag introduced by the load capacitance. It involves placing a resistor between the feedback loop and the load capacitor. One drawback, however, is decreased DC accuracy when the output has a load current. The amount of DC error will be the value of the isolation resistor multiplied by the output current.

The Riso dual feedback compensation scheme overcomes this DC inaccuracy. The circuit enables a high-frequency path through the feedback capacitor to stabilize the feedback loop and a DC path that allows the op amp to compensate for the I × R drop over the isolation resistor. You can find these values either mathematically or through simulation by trying different values of Riso and seeing where there is stable operation.

Let’s try an approach that uses mathematical analysis with simulated results.

The two main components for accurate modeling of amplifier loop stability are the open-loop gain and open-loop output impedance. TI’s standard op-amp macromodel, the Green-Williams-Lis (GWL) model, accurately characterizes these parameters for all op amps released after 2016. Many of the more popular op amps, such as the LM2904 and its newer version, the LM2904B, also have GWL macromodels created for them. The library file for the SPICE macromodels includes a header that details what parameters are accurately reflected in the SPICE model. If the open-loop gain and open-loop output impedance are modeled, it is likely that the stability of the model will reflect the silicon’s performance.

Ensuring the accuracy of the SPICE model enables you to analyze the loop stability of your circuit and mathematically calculate the best value for Riso. The value of Riso that ensures 45 degrees of phase margin should create a zero in the feedback loop at the intersection point of the feedback factor (1/beta) and the amplifier open-loop gain. For extra assurance, setting the zero where the open-loop gain is 20dB, you can see the maximum positive phase shift from the zero in the feedback loop.

Part of the power of PSpice for TI is you can set up, archive, and share simulations and equations for later schematics. Since the evaluation for Riso and Riso dual feedback are formulaic and easily repeatable, you can leverage these template projects to eliminate the need to remember the formulas to calculate Riso or the Rf/Cf for the Riso dual feedback circuit across four common op-amp circuits. Simply download the PSpice for TI project, drop in the op amp you want to analyze, enter the parameters that complete the specific circuit that needs stabilizing, and run the simulation to find the appropriate value of Riso that you need. These projects can also compensate circuits that are unstable from capacitance on the inverting terminal, or those with very large feedback resistors.