SNAA291A May   2016  – April 2021 ADC32RF45 , LMX2582 , LMX2592

 

  1.   Trademarks
  2. 1ADC Signal-to-Noise Ratio Components
  3. 2Understanding Phase Noise and Jitter and SNR
  4. 3Designing for Lowest Jitter
  5. 4Factors Influencing Jitter
  6. 5References
  7. 6Related Web Sites
  8. 7Revision History

5 References

  • LMX2582 High Performance, Wideband PLLatinum™ RF Synthesizer with Integrated VCO, (SNAS680)
  • LMX2592 High Performance, Wideband PLLatinum™ RF Synthesizer with Integrated VCO, (SNAS646)
  • ADC32RF45 Dual-Channel, 14-Bit, 3.0-GSPS, Analog-to-Digital Converter, (SBAS747)
  • Optimal Clock Sources for GSPS ADCs Design Guide, (TIDU870)
  • Maximizing SFDR Performance in the GSPS ADC: Spur Sources and Methods of Mitigation, (SLAA617)
  • Clock Jitter Analyzed in the Time Domain, Part 1, (SLYT379)
  • Clock Jitter Analyzed in the Time Domain, Part 2, (SLYT389)
  • Clock Jitter Analyzed in the Time Domain, Part 3, (SLYT422)
  • Direct RF Conversion: From Vision to Reality, (SLYY068)