5 Empirical Data and Results

The devices were tested at four different configurations at room temperature to observe for sparkle rate occurrence. The fist was a full-scale range sweep at the 15 input voltages listed in Table 5-1 with VA set to 5 V. The second observed response across clock rate. The third configured the devices in continuous conversion mode. The final configuration observed the effect of multiplexing between channels. All these tests were completed at room ambient temperature, with a VA at 5 V, and the digital supply was consistent at 3.3 V through all tests. Each configuration was observed for three test runs of equal size for each device, the results from all devices were combined to provide the following results.

The output code transitions were concluded to have an expected sparkle value by analysis of device design. The first test configuration was to verify the sparkle value across the full analog input range. The input voltage was set as a ratio of the full scale to result in the code transitions listed in Table 5-1. Three data collection runs consisting of 6.29 billion conversions per input ratio was completed, per device. The results are listed in Table 5-2, and range from no sparkle to 2 sparkles per billion conversions, at the expected sparkle value. From the table, it can be seen that all input ratios exhibit the expected sparkle, meaning all ratios are susceptible to a sparkle code. From this data, it can also be seen that certain input ratios experience higher sparkle rate than others. Two input ratios that the rest of this document will focus on, half scale (8/16) and near full scale (15/16) demonstrate this trend, as the half scale has a higher rate than the near full scale.

These first experiments were only conducted at clock rate set to 16MHz, and VA set to 5 V. The digital output code transition is what is being controlled, thus the true value of the voltage input is not considered here since the input signal will be adjusted to compensate for any changes in VA. Also, the corner condition at higher VA levels is expected to demonstrate worse case.

The second test configuration focused on clock rate; the clock rate directly controls the sample rate of the device. The sampling rate is found by diving the clock rate by 16. The device analog power supply is set to 5V, and only the midscale input ratio (8/16) was observed for all tests. The clock rates observed are 2MHz, 8MHz, and 16Mhz, correspond to 125Ksps, 500Ksps, and 1Msps sampling rate respectively. Each data collection run consisted of over 15.2 billion conversions per clock rate, per device. All the results were combined and displayed on Table 5-2. The maximum sparkle rate occurred at 2.17 per billion conversion at 2MHz clock rate, and the least sparkle occurrence at 0.953 conversions per billion at 16 MHz clock rate. It can be inferred from the table that lower clock rates have a slightly higher rate of sparkle occurrence, but not significant enough to deter a sampling rate over another.

The third test configuration focused on operating the device in continuous conversion mode. To operate the device in continuous conversion mode the CS signal needs to be held low across consecutive 16-clock-pulse long frames. The timing diagram seen in Figure 5-1 can also be found the ADC128S102QML-SP data sheet, and shows how to operate the device in continuous conversion mode. For this test, we only measured at a single channel consecutively.

Figure 5-1 Timing Diagram for Continuous Conversion Mode

The device analog power supply is set to 5V, and the input ratio used are midscale input ratio (8/16) and near full scale ratio (15/16). The clock rate was set to 16Mhz for all data collection runs. Three data collection runs consisting of 6.29 billion conversions per input ratio was completed, per device. The combined results are available in Table 5-3. From the results, it can be seen that a low sparkle occurrence of 0.158 sparkle per billion conversion was seen. It is important to note that the sample size for this configuration is less than half of the previous, second configuration. Continuous mode did not show a substantial difference in results than expected, although it seemed to show a slight lower sparkle occurrence but not significant enough to deter a sampling mode over the other.

The final device configuration tested was to determine if multiplexing between channels would have any effects on sparkle occurrence. The device was set to analog power supply of 5 V, and used a slower clock rate of 2MHz to eliminate any potential settling errors. Channel 0 was connected to the DP8200 to be driven by the firmware solution and channel 1 was at a DC non-sparkle code transition value, this input was not driven by the test solution. The device would then mux between the two channels monitoring for a sparkle code; the only recorded sparkle value occurred in channel 0 which was driven by the DP8200. Each data collection run consisted of 6.29 billion conversions, per device. The results are listed in Table 5-4, and are in line with expected results, falling within 1 to 2 sparkle codes per billion conversions. It is important to note that at this clock rate, the results coincide with previous results at this same clock rate.

Once an understanding of sparkle rate was achieved through the previous tests at room ambient temperature, the devices were tested at each temperature extrema. The devices were tested at -55°C and at 125°C, the limits of the device operating temperature. The analog power supply was also observed in this test configuration at 5 V and at 3.3 V. The sample size was decreased from previous test due to temperature exposure.

The first test configuration set the device analog power supply to 5 V, driven by the REF6050; the input ratio used are midscale input ratio (8/16) and near full scale ratio (15/16). The clock rate was set to 16Mhz for all data collection runs. The results were then combined for all devices tested to solve for the relation to per billion conversions and are listed in Table 5-5 and Table 5-6 for temperatures -55°C and at 125°C respectively.

From the results, it is evident the devices experience a higher rate of sparkle code per billion conversion at -55°C, while at 125°C the results show similar or lower sparkle code occurrence than previous results. This is aligned with corner condition performance expectations. It is also evident that the half scale input has a higher sparkle rate than the near full scale as expected.

The next test configuration solely changed the analog power supply to 3.3 V driven by the REF6033; recall that the analog power supply is also the reference in this device. All other parameters remained the same as the previous configuration. Results for temperatures -55°C and 125°C are listed in Table 5-7 and Table 5-8 respectively.

At lower analog power supply, the sparkle code rate greatly decreased, as seen in the following tables, and is aligned with corner condition performance expectations. At -55°C a max sparkle rate seen is 0.53 per billion conversion, at half scale, which is aligned with known trends. At -125°C a sparkle code occurrence was nor observed across any of the devices.