SNAA406 August   2024 LMK6C

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction and Test Methodology
  5. 2Routing Topologies and Simulation Results
    1. 2.1 Single-Line
    2. 2.2 Star Line
    3. 2.3 Split Line
    4. 2.4 Star Line vs. Split Line
  6. 3Summary
  7. 4References

3 Summary

These simulations have shown some of the factors to determine if driving multiple loads with a single LVCMOS oscillator is feasible in a system. Driving multiple loads from a single LVCMOS oscillator can always degrade signal integrity in some way. For best performance one can limit the numbers of loads which needs to be directly driven out of LMK6C by using a Clock buffer.

Guidelines for driving multiple loads with a single oscillator:

  • Limit the number of loads to 2
  • Maximize common trace length before branching out to individual receivers as shown in Star Line topologies
  • Limit total receiver capacitance to achieve fast rise/fall time

These guidelines can provide a basis for driving multiple loads in your system. By reducing the number of loads, reducing the brach trace length, and reducing the total parasitic and receiver capacitance, your system can be able to minimize the negative consequences of driving multiple loads with a single oscillator. The Star Line topology best models this kind of routing situation. If achieving absolute best performance is a priority, traces can never be split into multiple loads and instead a clock buffer like the 4-channel output LVCMOS 1.8-V buffer can be used to fanout the clock signal and drive multiple loads.