SNAA410 July 2024 CDCDB2000 , LMKDB1108 , LMKDB1120 , LMKDB1204
Slew rate can be controlled through pin 2, the SLEWRATE_SEL pin, or through software for both the RC19008 and the LMKDB1108; therefore, a logic priority needs to exist. Renesas does not define the logic priority used for the RC19008 or exposes the slew rate selection register. Therefore, TI assumed this as a difference between the RC19008 and the LMKDB1108.
The LMKDB1108 Data Sheet under the LMKDB1108 Registers section has more information about this register, R53[5] or SLEWRATE_CTRL_MODE.