SNAS660D June 2015 – May 2021 LM53600-Q1 , LM53601-Q1
PRODUCTION DATA
PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
---|---|---|---|---|---|---|
VFB | Initial output voltage accuracy | Vin= 3.8 V to 36 V Tj=25°C, Open Loop | –1% | 1% | ||
Vin= 3.8 V to 36 V, Open Loop | –1.5% | 1.5% | ||||
IQ | Operating quiescent current; measured at VIN pin | Vin= 13.5 V, Not switching Vbias= 5 V | 6.5 | µA | ||
Vin= 13.5 V, Not switching Vbias= 5 V, Tj= 85°C | 16 | |||||
IB | Bias current into BIAS pin for adjustable versions and FB pin for fixed versions | Vin= 13.5 V, Not switching Vbias= 5 V, Mode = 0 V | 46 | 80 | ||
ISD | Shutdown quiescent current; measured at VIN pin | EN = 0, VIN = 13.5 V Tj = 25°C | 1.8 | µA | ||
EN = 0, VIN = 13.5 V Tj = 85°C | 3 | |||||
Vin_UVLO | Minimum input voltage to operate | Rising | 3.2 | 3.6 | 3.75 | V |
Vin_UVLO _hyst | Minimum input voltage hysteresis | Hysteresis | 0.2 | 0.3 | 0.35 | V |
Vreset_OV | RESET upper threshold voltage | Rising, % of Vout | 105% | 106.5% | 110% | |
Vreset_UV | RESET lower threshold voltage | Falling, % Vout | 92% | 94% | 97% | |
Vreset_guard | Magnitude of RESET lower threshold difference from steady state output voltage | Steady state output voltage and RESET threshold read at the same TJ, and VIN | 3.9% | |||
Vreset_hyst | RESET hysteresis as a percent of output voltage set point | 1% | ||||
Vreset_valid | Minimum input voltage for proper RESET function | 50 µA pull-up to RESET pin, EN = 0 V, Tj = 25°C | 1.5 | V | ||
VOL | Low level RESET function output voltage | 50 µA pull-up to RESET pin, Vin = 1.5 V, EN = 0 V, Tj = 25°C | 0.4 | V | ||
0.5mA pull-up to RESET pin, Vin = 13.5 V, EN = 0 V | 0.4 | |||||
1mA pull-up to RESET pin, Vin = 13.5 V, EN = 3.3 V | 0.4 | |||||
Fsw | Switching frequency | VIN = 13.5 V, Center frequency with spread spectrum, PWM operation | 1.89 | 2.1 | 2.4 | MHz |
VIN = 13.5 V, Without spread spectrum, PWM operation | 1.89 | 2.1 | 2.4 | |||
VIN = 36 V, 3.3-V fixed output device and adjustable devices regardless of output voltage | 1.0 | |||||
VIN = 36 V, 5-V fixed output device | 1.5 | |||||
FSYNC | Sync frequency range | Output setting + 1 V < VIN < 18 V | 1.9 | 2.1 | 2.3 | MHz |
DSYNC | Sync input duty cycle range | High state input < 5.5 V and > 2.3 V | 25% | 75% | ||
VSYNC/MODE | SYNC/MODE input threshold voltage | SYNC/MODE input high (MODE=FPWM) | 1.5 | V | ||
SYNC/MODE input low (MODE = AUTO with diode emulation) | 0.4 | |||||
SYNC/MODE input hysteresis | 0.185 | 1 | ||||
FSSS | Frequency span of spread spectrum operation(2) | ±4% | ||||
FPSS | Spread spectrum pattern frequency(2) | 30 | Hz | |||
ISYNC/MODE | SYNC/MODE leakage current | Vin = 13.5 V, VSYNC/MODE = 3.3 V | 1 | µA | ||
VIN = VSYNC/MODE = 13.5 V | 5 | |||||
tMODE | Mode change transition time (2) | To FPWM Mode 20 mA load, VIN = 13.5 V | 100 | µs | ||
To AUTO Mode 20-mA load, VIN = 13.5 V | 60 | |||||
IL_HS | High side switch current limit (1) | LM53600-Q1 Duty cycle approaches 0% | 1.0 | 1.35 | 1.65 | A |
LM53601-Q1 Duty cycle approaches 0% | 1.5 | 1.83 | 2.1 | |||
IL_LS | Low side switch current limit | LM53600-Q1 | 0.65 | 0.78 | 0.93 | A |
LM53601-Q1 | 1.0 | 1.2 | 1.43 | |||
IL_ZC | Zero-cross current limit MODE/SYNC = Low | –0.01 | A | |||
IL_NEG | Negative current limit MODE/SYNC = High | LM53600-Q1 | –0.7 | A | ||
LM53601-Q1 | –0.7 | |||||
Rdson | Power switch on-resistance | High side MOSFET Rdson | 220 | mΩ | ||
Low side MOSFET Rdson | 200 | |||||
VEN | Enable input threshold voltage - rising | Enable rising | 1.7 | - | 2.0 | V |
VEN_HYST | Enable threshold hysteresis | 0.40 | - | 0.55 | V | |
VEN_WAKE | Enable Wake-up threshold | 0.4 | V | |||
IEN | Enable pin input current | VIN = VEN = 13.5 V | 2.7 | µA | ||
Vcc | Internal Vcc voltage | VIN = 13.5 V, Vbias= 0 V | 3.05 | V | ||
VIN = 13.5 V, Vbias= 3.3 V | 3.15 | |||||
Vcc_UVLO | Internal Vcc input under voltage lock-out | VCC rising | 2.7 | V | ||
Vcc_UVLO_hyst | Input under voltage lock-out hysteresis | Hysteresis below Vcc_uvlo | 190 | mV | ||
IFB | Input current from FB to AGND | LM53600-Q1-ADJ, FB = 1 V | 20 | nA | ||
Vref | Reference voltage for ADJ option only | Tj = 25°C | 0.993 | 1 | 1.007 | V |
0.985 | 1 | 1.015 | ||||
RRESET | Rdson of RESET output | 50 | 120 | Ω | ||
TSD | Thermal shutdown rising threshold(2) | 151 | 167 | 185 | °C | |
TSDF | Thermal shutdown falling threshold(2) | 140 | 157 | |||
TSD_hyst | Thermal shutdown hysteresis(2) | 10 | ||||
Dmax | Maximum switch duty cycle(2) | Fsw = 2.1 MHz | 76% | |||
While in frequency fold back | 96% |