SNAS669E September 2015 – April 2018 LMK03318
PRODUCTION DATA.
The PLL_CTRL1 register provides control of PLL. The PLL_CTRL1 register fields are described in the following table.
Bit # | Field | Type | Reset | EEPROM | Description | |
---|---|---|---|---|---|---|
[7:6] | RSRVD | - | - | N | Reserved. | |
[5] | RSRVD | RW | 0 | Y | Reserved. | |
[4] | PRI_D | RW | 1 | Y | Primary Reference Doubler Enable. If PRI_D is 1 the Primary Input Frequency Doubler is enabled. | |
[3:0] | PLL_CP[3:0] | RW | 0x8 | Y | PLL Charge Pump Gain. The PLL_CP sets the chargepump current as follows. | |
PLL_CP | Icp (mA) | |||||
1 (0x1) | 0.4 | |||||
2 (0x2) | 0.8 | |||||
3 (0x3) | 1.2 | |||||
4 (0x4) | 1.6 | |||||
5 (0x5) | 2.0 | |||||
6 (0x6) | 2.4 | |||||
7 (0x7) | 2.8 | |||||
8 (0x8) | 6.4 |