SNAS669E September 2015 – April 2018 LMK03318
PRODUCTION DATA.
The PLL_CTRL3 register provides control of PLL. The PLL_CTRL3 register fields are described in the following table.
Bit # | Field | Type | Reset | EEPROM | Description | |
---|---|---|---|---|---|---|
[7:3] | RSRVD | - | - | N | Reserved. | |
[2:0] | PLL_DISABLE_4TH[2:0] | RW | 0x3 | Y | PLL Loop Filter Settings. | |
PLL_DISABLE_4TH[2:0] | MODE | |||||
0 (0x0), 1 (0x1), 2 (0x2) | RESERVED | |||||
3 (0x3) | 2nd Order Loop Filter Recommended Setting for Integer PLL Mode. | |||||
4 (0x4), 5 (0x5), 6 (0x6) | RESERVED | |||||
7 (0x7) | 3rd Order Loop Filter Recommended Setting for Fractional PLL Mode. |