SNAS675A October   2015  – November 2015 LMK61PD0A2

PRODUCTION DATA.  

  1. 1 Features
  2. 2 Applications
  3. 3 Description
  4. 4 Revision History
  5. 5 Device Control
  6. 6 Pin Configuration and Functions
  7. 7 Specifications
    1. 7.1  Absolute Maximum Ratings
    2. 7.2  ESD Ratings
    3. 7.3  Recommended Operating Conditions
    4. 7.4  Thermal Information
    5. 7.5  Electrical Characteristics - Power Supply
    6. 7.6  LVPECL Output Characteristics
    7. 7.7  LVDS Output Characteristics
    8. 7.8  HCSL Output Characteristics
    9. 7.9  OE Input Characteristics
    10. 7.10 OS, FS[1:0] Input Characteristics
    11. 7.11 Frequency Tolerance Characteristics
    12. 7.12 Power-On/Reset Characteristics (VDD)
    13. 7.13 PSRR Characteristics
    14. 7.14 PLL Clock Output Jitter Characteristics
    15. 7.15 Additional Reliability and Qualification
    16. 7.16 Typical Performance Characteristics
  8. 8 Parameter Measurement Information
    1. 8.1 Device Output Configurations
  9. 9 Detailed Description
    1. 9.1 Overview
    2. 9.2 Functional Block Diagram
    3. 9.3 Feature Description
      1. 9.3.1 Device Block-Level Description
      2. 9.3.2 Device Configuration Control
  10. 10Application and Implementation
    1. 10.1 Application Information
    2. 10.2 Typical Application
      1. 10.2.1 Jitter Considerations in Serdes Systems
  11. 11Power Supply Recommendations
  12. 12Layout
    1. 12.1 Layout Guidelines
      1. 12.1.1 Ensuring Thermal Reliability
      2. 12.1.2 Best Practices for Signal Integrity
      3. 12.1.3 Recommended Solder Reflow Profile
  13. 13Device and Documentation Support
    1. 13.1 Community Resources
    2. 13.2 Trademarks
    3. 13.3 Electrostatic Discharge Caution
    4. 13.4 Glossary
  14. 14Mechanical, Packaging, and Orderable Information

12 Layout

12.1 Layout Guidelines

The following sections provides recommendations for board layout, solder reflow profile and power supply bypassing when using LMK61PD0A2 to ensure good thermal / electrical performance and overall signal integrity of entire system.

12.1.1 Ensuring Thermal Reliability

The LMK61PD0A2 is a high performance device. Therefore careful attention must be paid to device configuration and printed circuit board (PCB) layout with respect to power consumption. The ground pin needs to be connected to the ground plane of the PCB through three vias or more, as shown in Figure 16, to maximize thermal dissipation out of the package.

Equation 1 describes the relationship between the PCB temperature around the LMK61PD0A2 and its junction temperature.

Equation 1. TB = TJ – ΨJB * P

where

  • TB: PCB temperature around the LMK61PD0A2
  • TJ: Junction temperature of LMK61PD0A2
  • ΨJB: Junction-to-board thermal resistance parameter of LMK61PD0A2 (36.7°C/W without airflow)
  • P: On-chip power dissipation of LMK61PD0A2

In order to ensure that the maximum junction temperature of LMK61PD0A2 is below 125°C, it can be calculated that the maximum PCB temperature without airflow should be at 100°C or below when the device is optimized for best performance resulting in maximum on-chip power dissipation of 0.68 W.

12.1.2 Best Practices for Signal Integrity

For best electrical performance and signal integrity of entire system with LMK61PD0A2, it is recommended to route vias into decoupling capacitors and then into the LMK61PD0A2. It is also recommended to increase the via count and width of the traces wherever possible. These steps ensure lowest impedance and shortest path for high frequency current flow. Figure 16 shows the layout recommendation for LMK61PD0A2.

LMK61PD0A2 layout_example_snas675.png Figure 16. LMK61PD0A2 Layout Recommendation for Power Supply and Ground

12.1.3 Recommended Solder Reflow Profile

It is recommended to follow the solder paste supplier's recommendations to optimize flux activity and to achieve proper melting temperatures of the alloy within the guidelines of J-STD-20. It is preferrable for the LMK61PD0A2 to be processed with the lowest peak temperature possible while also remaining below the components peak temperature rating as listed on the MSL label. The exact temperature profile would depend on several factors including maximum peak temperature for the component as rated on the MSL label, Board thickness, PCB material type, PCB geometries, component locations, sizes, densities within PCB, as well solder manufactures recommended profile, and capability of the reflow equipment to as confirmed by the SMT assembly operation.