SNAS699B January 2017 – July 2019 LMK04610
PRODUCTION DATA.
The OUTCH78CNTRL0 Register controls Output CH7_8. Return to Register Map.
BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | OUTCH78_LDO_BYP_MODE | RW | 0 | OUTCH78 LDO Bypass.
OUTCH78_LDO_BYP_MODE– LDO State 0– Enabled 1– Bypassed |
[6] | OUTCH78_LDO_MASK | RW | 0 | OUTCH78 LDO Mask. If OUTCH78_LDO_MASK is 1 then CH78 LDO is masked from the Power Sequence. |
[5:0] | OUTCH7_DRIV_MODE[5:0] | RW | 0x18 | OUTCH7 Clock Driver Mode Setting.
0 - Power down 16 - HSDS 4 mA 20 - HSDS 6 mA 24 - HSDS 8 mA 59 - HCSL 8 mA 63 - HCSL 16 mA |