SNAS699B January 2017 – July 2019 LMK04610
PRODUCTION DATA.
The PLL2_CTRL3 Register provides control of PLL2 features. Return to Register Map.
BIT NO. | FIELD | TYPE | RESET | DESCRIPTION |
---|---|---|---|---|
[7] | RSRVD | - | - | Reserved. |
[6] | PLL2_NBYPASS_DIV2_FB | RW | 0 | Enable By-2 Divider in PLL2 Feedback.
nbypass_div2_fb– PLL2 Feedback by-2 Divider 0– Divider Off 1– Divider On |
[5:2] | PLL2_PRESCALER[3:0] | RW | 0x0 | PLL2 VCO Prescaler Configuration.
PLL2_PRESCALEr – Effect 00XX– PLL2 VCO Prescaler DIV3 01XX– PLL2 VCO Prescaler DIV4 10XX– PLL2 VCO Prescaler DIV5 11XX– PLL2 VCO Prescaler DIV6 |
[1:0] | PLL2_FBDIV_MUXSEL[1:0] | RW | 0x0 | PLL2 Feedback MUX control.
PLL2_FBDIV_MUXSEL– Effect 00– Feedback Prescaler Output 01– Feedback OUTCH6 Output (Zero Delay Mode) 10– Feedback OUTCH5 Output (Zero Delay Mode) |