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LMK00804B-Q1 1.5-V to 3.3-V, 1-to-4 High-Performance LVCMOS Fan-Out Buffer and Level Translator
SNAS784B
March 2019 – August 2019
LMK00804B-Q1
PRODUCTION DATA.
CONTENTS
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LMK00804B-Q1 1.5-V to 3.3-V, 1-to-4 High-Performance LVCMOS Fan-Out Buffer and Level Translator
1
Features
2
Applications
3
Description
Device Images
Simplified Schematic
4
Revision History
5
Pin Configuration and Functions
Pin Functions
6
Specifications
Table 1.
Absolute Maximum Ratings
Table 2.
ESD Ratings
Table 3.
Recommended Operating Conditions
Table 4.
Thermal Information
Table 5.
Power Supply Characteristics
Table 6.
LVCMOS / LVTTL DC Electrical Characteristics
Table 7.
Differential Input DC Electrical Characteristics
Table 8.
Switching Characteristics
Table 9.
Pin Characteristics
6.1
Typical Characteristics
7
Parameter Measurement Information
8
Detailed Description
8.1
Overview
8.2
Functional Block Diagram
8.3
Feature Description
8.3.1
Clock Enable Timing
8.4
Device Functional Modes
9
Applications and Implementation
9.1
Application Information
9.2
Typical Applications
9.2.1
Output Clock Interface Circuit
9.2.1.1
Design Requirements
9.2.1.2
Detailed Design Procedure
9.2.1.3
Application Curve
9.2.1.3.1
System-Level Phase Noise and Additive Jitter Measurement
9.2.2
Input Detail
9.2.3
Input Clock Interface Circuits
9.3
Do's and Don'ts
9.3.1
Power Dissipation Calculations
9.3.2
Thermal Management
9.3.3
Recommendations for Unused Input and Output Pins
9.3.4
Input Slew Rate Considerations
10
Power Supply Recommendations
10.1
Power Supply Considerations
10.1.1
Power-Supply Filtering
11
Layout
11.1
Layout Guidelines
11.1.1
Ground Planes
11.1.2
Power Supply Pins
11.1.3
Differential Input Termination
11.1.4
LVCMOS Input Termination
11.1.5
Output Termination
11.2
Layout Example
12
Device and Documentation Support
12.1
Documentation Support
12.1.1
Related Documentation
12.2
Receiving Notification of Documentation Updates
12.3
Community Resources
12.4
Trademarks
12.5
Electrostatic Discharge Caution
12.6
Glossary
13
Mechanical, Packaging, and Orderable Information
IMPORTANT NOTICE
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DATA SHEET
LMK00804B-Q1 1.5-V to 3.3-V, 1-to-4 High-Performance LVCMOS Fan-Out Buffer and Level Translator
1
Features
AEC-Q100 qualified with the following results:
Device temperature grade 1: –40°C to +125°C, T
A
Four LVCMOS/LVTTL outputs supporting 1.5-V to 3.3-V levels
Additive jitter: 0.1-ps RMS (typical) at 40 MHz
Noise floor: –168 dBc/Hz (typical) at 40 MHz
Output frequency: 350 MHz (maximum)
Output skew: 35 ps (maximum)
Part-to-part skew: 550 ps (maximum)
Two selectable inputs
CLK_P, CLK_N pair accepts LVPECL, LVDS, HCSL, SSTL, LVHSTL, or LVCMOS/LVTTL
LVCMOS_CLK accepts LVCMOS/LVTTL
Synchronous clock enable
Core/output power supplies:
3.3 V/3.3 V
3.3 V/2.5 V
3.3 V/1.8 V
3.3 V/1.5 V
Package: 16-pin VQFN
2
Applications
Advanced Driver Assistance Systems (ADAS)
Forward-facing long range radar
Medium/short range radar
Ultra short range radar
