SNAU182A
March 2021 – May 2022
Trademarks
1
LMX2571EPEVM Evaluation Module
1.1
Evaluation Module Contents
1.2
Evaluation Setup Requirement
1.3
Resources
2
Setup
2.1
Connection Diagram
2.2
Power Supply
2.3
Reference Clock
2.4
RF Output
2.5
Programming
2.6
Evaluation Software
2.7
EVM Strap Options
2.7.1
J11 Header
2.7.2
J12 Header
3
Typical Measurement
3.1
Default Configuration
3.1.1
Loop Filter
3.1.2
Typical Output
3.2
Additional Tests
3.2.1
FSK Modulation
3.2.2
Register Readback
4
Schematic
5
Board Construction
5.1
PCB Layer Stack-Up
5.2
PCB Layout
6
Bill of Materials
7
Troubleshooting Guide
A Using Different Reference Clock
B Reference PRO
B.1 Output Frequency Selection
B.2 Output Format Selection
B.3 Typical Output Characteristics
B.4 Firmware Update
C Revision History
4
Schematic
Figure 4-1
LMX2571EPEVM Schematic