SNAU182A March   2021  – May 2022

 

  1.   Trademarks
  2. 1LMX2571EPEVM Evaluation Module
    1. 1.1 Evaluation Module Contents
    2. 1.2 Evaluation Setup Requirement
    3. 1.3 Resources
  3. 2Setup
    1. 2.1 Connection Diagram
    2. 2.2 Power Supply
    3. 2.3 Reference Clock
    4. 2.4 RF Output
    5. 2.5 Programming
    6. 2.6 Evaluation Software
    7. 2.7 EVM Strap Options
      1. 2.7.1 J11 Header
      2. 2.7.2 J12 Header
  4. 3Typical Measurement
    1. 3.1 Default Configuration
      1. 3.1.1 Loop Filter
      2. 3.1.2 Typical Output
    2. 3.2 Additional Tests
      1. 3.2.1 FSK Modulation
      2. 3.2.2 Register Readback
  5. 4Schematic
  6. 5Board Construction
    1. 5.1 PCB Layer Stack-Up
    2. 5.2 PCB Layout
  7. 6Bill of Materials
  8. 7Troubleshooting Guide
  9.   A Using Different Reference Clock
  10.   B Reference PRO
    1.     B.1 Output Frequency Selection
    2.     B.2 Output Format Selection
    3.     B.3 Typical Output Characteristics
    4.     B.4 Firmware Update
  11.   C Revision History

B.2 Output Format Selection

The OE pin is used to enable or disable the output.

The OS pin is used to bias internal drivers and change the output format.

Table 9-2 Reference PRO Output Format Selection
OE OS OUTPUT FORMAT
GND Don't Care Disabled
Vdd GND LVPECL
Vdd NC LVDS
Vdd Vdd HCSL

It is imperative to match the output termination passive components as shown in Table 9-3.

Table 9-3 Output Termination Configuration
OUTPUT FORMAT COUPLING COMPONENT VALUE
LVPECL AC (Default configuration) R15, R28 0 Ω
R26, R29 150 Ω
C24, C25 0.01 µF
R27, R30, R31 DNP
DC(1) R15, R28, C24, C25 0 Ω
R26, R27, R29, R30, R31 DNP
LVDS(2) AC R25, R27, R28, R30 0 Ω
R31 100 Ω
C24, C25 0.01 µF
R26, R29 DNP
DC R25, R27, R28, R30, C24, C25 0 Ω
R31 100 Ω
R26, R29 DNP
HCSL AC R25, R28 0 Ω
R26, R29 50 Ω
C24, C25 0.01 µF
R27, R30, R31 DNP
DC R25, R28, C24, C25 0 Ω
R26, R29 50 Ω
R27, R30, R31 DNP
(1) 50-Ω to VCC – 2-V termination is required on receiver.
(2) 100-Ω differential termination (R31) is provided onboard. Removing this termination is possible if the differential termination is available on the receiver.
GUID-15D8A525-9DE2-4A11-82B5-3DBB7FC7C4EE-low.png Figure 9-1 Output Termination Schematic