SNAU257 October 2020 TPL1401
The TPL1401EVM provides access to all DAC pins through connection J1 and J2, as listed in Table 3-6 and Table 3-7.
Pin# | Signal | Description |
---|---|---|
1 | VDD | VDD power supply |
2 | A0 | I2C address select |
3 | NC | Not connected |
4 | SCL | I2C SCL |
5 | REF | Reference input |
6 | NC | Not connected |
7 | NC | Not connected |
8 | NC | Not connected |
9 | NC | Not connected |
10 | NC | Not connected |
11 | NC | Not connected |
12 | NC | Not connected |
13 | AGND | Analog ground |
14 | AGND | Analog ground |
15 | AGND | Analog ground |
16 | AGND | Analog ground |
Pin# | Signal | Description |
---|---|---|
1 | GND | PCB ground |
2 | NC | Not connected |
3 | NC | Not connected |
4 | SDA | I2C SDA |
5 | VOUT | DAC output |
6 | VFB | DAC feedback pin |
7 | DAC_VIO | Pull-up for DAC I2C signals |
8 | VIO | Power supply for EEPROM |
9 | NC | Not connected |
10 | NC | Not connected |
11 | NC | Not connected |
12 | LDO_CAP | LDO bypass capacitor |
13 | AGND | Analog ground |
14 | AGND | Analog ground |
15 | AGND | Analog ground |
16 | AGND | Analog ground |