SNAU263A February   2022  – July 2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2EVM Quick Start
  5. 3EVM Configuration
    1. 3.1  Power Supply
    2. 3.2  Logic Inputs and Outputs
    3. 3.3  Switching Between I2C and SPI
    4. 3.4  Generating SYSREF Request
    5. 3.5  XO Input
      1. 3.5.1 48-MHz TCXO (Default)
      2. 3.5.2 External Clock Input
      3. 3.5.3 Additional XO Input Options
      4. 3.5.4 APLL Reference Options
    6. 3.6  Reference Clock Inputs
    7. 3.7  Clock Outputs
    8. 3.8  Status Outputs and LEDS
    9. 3.9  Requirements for Making Measurements
    10. 3.10 Typical Phase Noise Characteristics
  6. 4EVM Schematics
    1. 4.1  Power Supply Schematic
    2. 4.2  Alternative Power Supply Schematic
    3. 4.3  Power Distribution Schematic
    4. 4.4  LMK5B33216 and Input Reference Inputs IN0 to IN1 Schematic
    5. 4.5  Clock Outputs OUT0 to OUT3 Schematic
    6. 4.6  Clock Outputs OUT4 to OUT9 Schematic
    7. 4.7  Clock Outputs OUT10 to OUT15 Schematic
    8. 4.8  XO Schematic
    9. 4.9  Logic I/O Interfaces Schematic
    10. 4.10 USB2ANY Schematic
  7. 5EVM Bill of Materials
    1. 5.1 Loop Filter and Vibration Nonsensitive Capacitors
  8. 6Appendix A - TICS Pro LMK5B33216 Software
    1. 6.1  Using the Start Page
      1. 6.1.1 Step 1
      2. 6.1.2 Step 2
      3. 6.1.3 Step 3
      4. 6.1.4 Step 4
      5. 6.1.5 Step 5
      6. 6.1.6 Step 6
      7. 6.1.7 Step 7
    2. 6.2  Using the Status Page
    3. 6.3  Using the Input Page
      1. 6.3.1 Cascaded Configurations
        1. 6.3.1.1 Cascade VCO to APLL Reference
    4. 6.4  Using APLL1, APLL2, and APLL3 Pages
      1. 6.4.1 APLL DCO
    5. 6.5  Using the DPLL1, DPLL2, and DPLL3 Pages
      1. 6.5.1 DPLL DCO
    6. 6.6  Using the Validation Page
    7. 6.7  Using the GPIO Page
      1. 6.7.1 SYNC/SYSREF/1-PPS Page
    8. 6.8  Using the Outputs Page
    9. 6.9  EEPROM Page
    10. 6.10 Design Report Page
  9. 7Revision History

3.1 Power Supply

The LMK5B33216 has VDD and VDDO supply pins that operate from 3.3 V ± 5%.

J500 is the main power terminal to the external power supply. Power SMA port VIN1 (J2) provides an alternative connector style to apply power through coax cable. By default this SMA connector is not populated.

On the EVM, there are three methods for supplying power.

  1. The default power configuration uses the onboard DC/DC supply (U500) to power all VDD and VDDO pins as well as the onboard XO from an external 12-V supply input to VIN4 on J500.

  2. The LDO power configuration uses three separate LDO regulators (U9, U10, and U11) to power the VDD, VDDO, and XO from an external 5-V supply input to VIN1 on J500 (or J2).

  3. The direct power configuration allows for separate voltage supplies for the VDD, VDDO, and XO. In the direct power configuration mode, an external 3.3-V supply is provided to VIN1 to power the VDD pins, an external 3.3-V supply is provided to VIN2 to power the VDDO pins, and an external 3.3-V supply is provided to VIN3 to power the onboard XO.

Note: Not every power connection is used or required to operate the EVM. Other power configurations are possible. See the power schematics in Figure 4-1 and Figure 4-3.
Figure 3-2 Default Power Jumper Configuration.

Figure 3-2 shows the default power jumper locations and settings. Table 3-2 shows the suggested power configurations for the LMK5B33216.

Table 3-2 Suggested Power Configurations
CONNECTIONNAME

ONBOARD DC/DC SUPPLY (DEFAULT)

ONBOARD LDO REGULATORSDIRECT EXTERNAL SUPPLIES

VDD = 3.3 V (DCDC1)

VDDO = 3.3 V (DCDC1)

XO = 3.3 V (DCDC1)

VDD = 3.3 V (LDO1)

VDDO = 3.3 V (LDO2)

XO = 3.3 V (LDO3)

VDD = 3.3 V (EXT. VIN1)

VDDO = 3.3 V (EXT. VIN2)

XO = 3.3 V (EXT. VIN3)

J500PWR

  • Pin 1 (VIN1): n/a

  • Pin 2 (VIN2): n/a
  • Pin 3 (VIN3): n/a
  • Pin 4 (VIN4): Connect to external 12-V supply
  • Pin 5 (GND): Connect to supply ground

  • Pin 1 (VIN1): Connect to external 5-V supply

  • Pin 2 (VIN2): n/a

  • Pin 3 (VIN3): n/a

  • Pin 4 (VIN4): n/a

  • Pin 5 (GND): Connect to supply ground

  • Pin 1 (VIN1): Connect to external 3.3-V supply

  • Pin 2 (VIN2): Connect to external 3.3-V supply

  • Pin 3 (VIN3): Connect to external 3.3-V supply

  • Pin 4 (VIN4): n/a

  • Pin 5 (GND): Connect to supply ground

JP1VDD
  • Tie pins 1-2 (opposite to designator) to select 3.3 V from DCDC1 to VDD Plane

  • Tie pins 3-4 (middle pins) to select 3.3 V from LDO1 to VDD Plane

  • Tie pins 5-6 (adjacent to designator) to select external VIN1 to VDD Plane

JP2VDDO
  • Tie pins 1-2 (opposite to designator) to select 3.3 V from DCDC1 to VDDO Plane

  • Tie pins 3-4 (middle pins) to select 3.3 V from LDO2 to VDDO Plane

  • Tie pins 5-6 (adjacent to designator) to select external VIN2 to VDDO Plane

JP4XO
  • Tie pins 1-2 (opposite to designator) to select 3.3 V from DCDC1 to XO supply
  • Tie pins 3-4 (middle pins) to select 3.3 V from LDO3 to XO supply
  • Tie pins 5-6 (adjacent to designator) to select external VIN3 to XO supply