SNAU270 February   2022 LMK1D1208I

 

  1.   Trademarks
  2. 1 Features
  3. 2 General Description
  4. 3 Signal Path and Control Circuitry
  5. 4 Getting Started
  6. 5 Power Supply Connection
  7. 6 Input Clock
    1. 6.1 Differential Input
    2. 6.2 Single-Ended Input
  8. 7 Output Clock
  9. 8 Using I2C
    1. 8.1 I2C Address Selection
  10. 9 EVM Board Schematic
  11. 10Bill of Materials
  12. 11REACH Compliance

8.1 I2C Address Selection

The LMK1D1208I can be configured among four different I2C addresses by setting the two-level IDX pins. Jumpers, J9 and J6, are routed to the IDX0 and IDX1 pins and can be connected to VDD or GND. Use Table 8-1 to determine the appropriate jumper layout to select the I2C address.

Table 8-1 I2C Address Assignment
I2C ADDRESS IDX1 IDX0
0x68 GND GND
0x69 GND VDD
0x6A VDD GND
0x6B VDD VDD
GUID-20211216-SS0I-KLZD-B4HG-0FKW8KL7W218-low.png Figure 8-4 I2C Address Selection Layout.