SNAU273 December 2022 LMX2820
Phase synchronization of the LMX2820 means that the delay from the rising edge of the reference clock signal to the output signal is deterministic. If multiple LMX2820 devices share the same reference clock, it is possible to have all the outputs from LMX2820 devices phase-aligned. Depending on the input and output signal frequencies, a SYNC signal may be necessary to assist phase synchronization.
Initially, the LMX2820 devices are locked to the input reference clock (fOSCIN), but are not synchronized. The user sends a synchronization pulse that is reclocked to the next rising edge of fOSCIN. After a certain time (known as t1), the phase relationship from fOSCIN to fOUT will be deterministic. t1 is dominated by the sum of the VCO calibration time, the analog setting time of the PLL loop, and the register MASH_RST_COUNT, if used in fractional mode. t2 is the deterministic delay between fOSCIN and fOUT after synchronization.