SNAU279A July   2022  – September 2022

 

  1.   Abstract
  2.   Trademarks
  3. 1Introduction
  4. 2EVM Quick Start
  5. 3EVM Configuration
    1. 3.1  Power Supply
    2. 3.2  Logic Inputs and Outputs
    3. 3.3  Switching Between I2C and SPI
    4. 3.4  Generating SYSREF Request
    5. 3.5  XO Input
      1. 3.5.1 48-MHz TCXO (Default)
      2. 3.5.2 External Clock Input
      3. 3.5.3 Additional XO Input Options
      4. 3.5.4 APLL Reference Options
    6. 3.6  Reference Clock Inputs
    7. 3.7  Clock Outputs
    8. 3.8  Status Outputs and LEDs
    9. 3.9  Requirements for Making Measurements
    10. 3.10 Typical Phase Noise Characteristics
  6. 4EVM Schematics
    1. 4.1  Power Supply Schematic
    2. 4.2  Alternative Power Supply Schematic
    3. 4.3  Power Distribution Schematic
    4. 4.4  LMK5B33414 and Input Reference Inputs IN0 to IN1 Schematic
    5. 4.5  Clock Outputs OUT0 to OUT3 Schematic
    6. 4.6  Clock Outputs OUT4 to OUT9 Schematic
    7. 4.7  Clock Outputs OUT10 to OUT13 and Clock Inputs IN2 and IN3 Schematic
    8. 4.8  XO Schematic
    9. 4.9  Logic I/O Interfaces Schematic
    10. 4.10 USB2ANY Schematic
  7. 5EVM Bill of Materials
    1. 5.1 Loop Filter and Vibration Nonsensitive Capacitors
  8. 6Appendix A - TICS Pro LMK5B33414 Software
    1. 6.1  Using the Start Page
      1. 6.1.1 Step 1
      2. 6.1.2 Step 2
      3. 6.1.3 Step 3
      4. 6.1.4 Step 4
      5. 6.1.5 Step 5
      6. 6.1.6 Step 6
      7. 6.1.7 Step 7
    2. 6.2  Using the Status Page
    3. 6.3  Using the Input Page
      1. 6.3.1 Cascaded Configurations
        1. 6.3.1.1 Cascade VCO to APLL Reference
    4. 6.4  Using APLL1, APLL2, and APLL3 Pages
      1. 6.4.1 APLL DCO
    5. 6.5  Using the DPLL1, DPLL2, and DPLL3 Pages
      1. 6.5.1 DPLL DCO
    6. 6.6  Using the Validation Page
    7. 6.7  Using the GPIO Page
    8. 6.8  SYNC/SYSREF/1-PPS Page
    9. 6.9  Using the Outputs Page
    10. 6.10 EEPROM Page
    11. 6.11 Design Report Page
  9. 7Revision History

3.5.3 Additional XO Input Options

For flexibility, the EVM provides additional XO input options (use one at a time). C70 allows an external reference to be provided at SMA connector XO (J8). C71 allows one of the onboard XO/TCXO/OCXO footprints to be used.

By default, Y1 is populated with a 48-MHz TCXO and selected with the populated R43 and R206. R43 provides the output clock of Y1 to the XO pin of the LMK5B33414 and R206 provides power to Y1.

Additional PCB footprints are available to install alternate components for performance evaluation of specific oscillators. These additional footprints are Y2 (2.5 × 2.0 mm), Y3 (3.2 mm × 2.5 mm), Y4 (9.7 mm × 7.5 mm), Y5 (25 mm × 22 mm), and U4 (2.5 mm × 2 mm).

When using Y2, Y3, Y4, Y5, or U4, R43 and R206 must be removed to power down and isolate the output of Y1. When populating Y2, R46 and R207 must be populated to power up Y2 and provide its output to the XO pin. When populating Y3, R47 must be populated to provide Y3's output to the XO pin. When populating Y4, R48 must be populated to provide Y4's output to the XO pin. When populating Y5, R49 must be populated to provide Y5's output to the XO pin. When populating U4, R50 must be populated to provide U4's output to the XO pin. Section 4.8 shows the components described above.

Take care if more than one device is installed to remove resistors to power down unused oscillators and isolate their outputs as described above.