SNAU286 November   2024

 

  1.   1
  2. 1Description
  3. 2Features
  4.   4
  5. 3Evaluation Module Overview
    1. 3.1 Introduction
    2. 3.2 Kit Contents
    3. 3.3 Specifications
  6. 4Implementation Results
    1. 4.1 Evaluation Setup Requirement
    2. 4.2 Setup
      1. 4.2.1 Connection Diagram
      2. 4.2.2 Power Supply
      3. 4.2.3 Clock Output
      4. 4.2.4 EVM Header Configuration
      5. 4.2.5 Configuring the Output Clock Termination
    3. 4.3 Performance Data and Results
      1. 4.3.1 Typical Measurement
  7. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layout and Layer Stack-Up
      1. 5.2.1 PCB Layer Stack-Up
      2. 5.2.2 PCB Layout
    3. 5.3 Bill of Materials
  8. 6Additional Information
    1.     Trademarks
  9. 7Related Documentation

3.1 Introduction

The CDC6C is an LVCMOS high-performance clock oscillator using TI's BAW technology. The CDC6C is available in four package sizes: DLE/DLN (3.2mm × 2.5mm), DLF (2.5mm × 2.0mm), DLX/DLR (2.0mm × 1.6mm), and DLY (1.6mm × 1.2mm). All four footprints are included on the EVM with independent termination networks. By default the CDC6CEVM is populated with a 25MHz variant of CDC6C with a DLE package size. The DLF, DLX, and DLY footprints are left unpopulated by default so the user can solder the desired frequency variant for evaluation.

The CDC6CEVM can be powered entirely using USB and the onboard voltage regulators. An external power supply can also be used for evaluation.

To begin evaluating the CDC6C BAW oscillator, use an SMA coaxial cable to connect one of the clock outputs to test equipment such an oscilloscope or phase noise analyzer, or use the output directly as a clock source for another reference board.