SNAU291 October   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 EVM Quick Start
      1. 2.1.1 Hardware Setup
      2. 2.1.2 EVM Measurements
    2. 2.2 Device Operation Modes
    3. 2.3 EVM Configuration
      1. 2.3.1 Power Supply
      2. 2.3.2 Logic Input and Outputs
      3. 2.3.3 Clock Input
      4. 2.3.4 Clock Outputs
      5. 2.3.5 Status Outputs, LEDs and Test Points
  8. 3Software
    1. 3.1 Software Installation
      1. 3.1.1 Software Setup
      2. 3.1.2 Program and Setup
    2. 3.2 TICS Pro LMKDB1108 Software
      1. 3.2.1 Input
        1. 3.2.1.1 Input Interface Type
        2. 3.2.1.2 Input Termination
        3. 3.2.1.3 Auto Output Disable (AOD)
        4. 3.2.1.4 LOS Event
        5. 3.2.1.5 LOS Readback
      2. 3.2.2 Device Info
        1. 3.2.2.1 EVM Setup
        2. 3.2.2.2 SMBus
      3. 3.2.3 Output
        1. 3.2.3.1 SMBus
        2. 3.2.3.2 OE Pin Control
        3. 3.2.3.3 Side Band Interface (SBI)
  9. 4Implementation Results
    1. 4.1 Typical Phase Noise Characteristic
  10. 5Hardware Design Files
    1. 5.1 Schematics
    2. 5.2 PCB Layouts
    3. 5.3 Bill of Materials (BOM)
  11. 6Compliance Information
    1. 6.1 Compliance and Certifications
  12. 7References

Schematics

GUID-20231012-SS0I-PCWT-9ZKJ-JJ1VPRK0NSC9-low.svg Figure 5-1 Power Supply (External and USB option)
GUID-20231012-SS0I-WPPC-8M4L-HXMQMHCKTTWV-low.svg Figure 5-2 LMKDB1108 Device and CLKIN_P/N Reference
GUID-20231012-SS0I-LXVC-D2LM-MWWVMVW9HLK6-low.png Figure 5-3 Clock Outputs CLK0 to CLK7
GUID-20231012-SS0I-KPVB-BW62-ZQN6867WRCJX-low.png Figure 5-4 Output Enable Pins (OE#)
GUID-20231012-SS0I-73R2-9H86-C9MLWWPMLTTG-low.svg Figure 5-5 Logic I/O Jumpers
GUID-20231012-SS0I-36DC-N1XQ-B0VG2F440WLT-low.png Figure 5-6 Status LEDs and Test Points
GUID-20231012-SS0I-MDRP-NP0V-TX7TQFQGWNQW-low.svg Figure 5-7 USB Schematic
GUID-20231012-SS0I-J4XC-DF2Z-FKWZX82MDWLW-low.png Figure 5-8 I/O Expander, MUX, and Buffer Used for SBI and OE Pin Control