SNAU293 May   2024 LMX1860-SEP

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1 Setup
      1. 2.1.1  Evaluation Setup Requirement
      2. 2.1.2  Connection Diagram
      3. 2.1.3  How to Enable Full SPI Control
      4. 2.1.4  Power Requirements
      5. 2.1.5  Pin Mode Strapping
      6. 2.1.6  Reference Clock
      7. 2.1.7  Output Connections
      8. 2.1.8  Header Information
      9. 2.1.9  Default Configuration
      10. 2.1.10 How to Generate SYSREF
      11. 2.1.11 Multiplier Mode Example
      12. 2.1.12 Divider Mode Example
      13. 2.1.13 Hybrid Mode: SPI and Pin Mode
  8. 3Software
    1. 3.1 Software Installation
    2. 3.2 Software Description
    3. 3.3 USB2ANY Interface
  9. 4Implementation Results
    1. 4.1 Buffer, Divider, and Multiplier Modes
    2. 4.2 SYSREF Generation
    3. 4.3 SYSREF Delay Generators
  10. 5Hardware Design Files
    1. 5.1 Schematic
    2. 5.2 PCB Layout
    3. 5.3 PCB Layer Stack-Up
    4. 5.4 Bill of Materials
  11. 6Additional Information
    1. 6.1 Troubleshooting Guide
      1. 6.1.1 General Guidance
      2. 6.1.2 If Output Is Not Seen on CLKOUT
      3. 6.1.3 If Device Features Are Not Active
      4. 6.1.4 If Multiplier Frequency Is Not Accurate
      5. 6.1.5 If Divider Frequency Is Not Accurate
      6. 6.1.6 If SYSREF Is Not Observed
    2. 6.2 Trademarks

2.1.9 Default Configuration

The LMX1860-SEP EVM silicon default is buffer mode with all outputs enabled with maximum output power. SPI is disabled in this mode assuming no jumpers are being utilized and neither the IO expander. LOGICLK is also enabled in this mode with a fixed divider value of 128.