SNAU298A October   2023  – October 2024

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2EVM Quick Start
    1. 2.1 Hardware Setup
    2. 2.2 Software Setup
      1. 2.2.1 TICS Pro GUI Setup
      2. 2.2.2 Power Up Sequence
    3. 2.3 EVM Measurements
  8. 3Hardware
    1. 3.1 Device Operation Modes
    2. 3.2 EVM Configuration
      1. 3.2.1 Power Supply
      2. 3.2.2 Logic Input and Outputs
      3. 3.2.3 Clock Input
      4. 3.2.4 Clock Outputs
      5. 3.2.5 Status Outputs, LEDs, and Test Points
  9. 4Software
    1. 4.1 TICS Pro LMKDB1120 Software
      1. 4.1.1 Input
        1. 4.1.1.1 Input Interface Type
        2. 4.1.1.2 Input Termination
        3. 4.1.1.3 Automatic Output Disable (AOD)
        4. 4.1.1.4 LOS Event
        5. 4.1.1.5 LOS Readback
      2. 4.1.2 Device Info and EVM Setup
        1. 4.1.2.1 Device Info
        2. 4.1.2.2 EVM Setup
        3. 4.1.2.3 SMBus
      3. 4.1.3 Output
        1. 4.1.3.1 SMBus
          1. 4.1.3.1.1 Programmable Output Slew Rate Control
        2. 4.1.3.2 OE Pin Control
        3. 4.1.3.3 Side Band Interface (SBI)
  10. 5Implementation Results
    1. 5.1 Typical Phase Noise Characteristic
  11. 6Hardware Design Files
    1. 6.1 Schematics
    2. 6.2 PCB Layouts
    3. 6.3 Bill of Materials (BOM)
  12. 7Compliance Information
    1. 7.1 Compliance and Certifications
  13. 8References
  14. 9Revision History

3.2.2 Logic Input and Outputs

The logic input and output pins on LMKDB1120 provides different options to select device functional modes, output enable and disable control, loss of signal (LOS) detection, and different device address selection. The following section describes the function of different input and output logic pins. Voltage levels for input pins can be set through TICSPro GUI or using on-board jumper as specified in Table 3-1.

Table 3-3 Device Start-Up Modes
SBEN_EN Input Level Start-up Mode
Low (default) SBI inactive
High SBI active
Table 3-4 Output Enable Pin Control
OE0# to OE19# INPUT LEVEL OUTPUT STATUS
Low (default) Active
High Inactive
Table 3-5 Loss of Signal Detection (LOS)
LOSb OUTPUT LEVEL (Status pin) LOS STATUS
Low Detected
High Not detected
Table 3-6 SMBus Address Decode
Address Selection Binary Value Hex Value
SADR1_tri SADR0_tri 7 6 5 4 3 2 1 Rd/Wrt Without Rd/Wrt With Rd/Wrt
0 0 1 1 0 1 1 0 0 0 6C D8
M 1 1 0 1 1 0 1 0 6D DA
1 1 1 0 1 1 1 1 0 6F DE
M 0 1 1 0 0 0 0 1 0 61 C2
M 1 1 0 0 0 1 0 0 62 C4
1 1 1 0 0 0 1 1 0 63 C6
1 0 1 1 0 0 1 0 1 0 65 CA
M 1 1 0 0 1 1 0 0 66 CC
1 1 1 0 0 1 1 1 0 67 CE
Note: SMBus address for the device is Bits[7:1]. Often Rd/Wrt bit is included in the hex value depending on the different vendors. With Rd/Wrt column shows hex value when Rd/Wrt value is considered 0, while Without Rd/Wrt is the SMBus address.