SNAU299 January   2024 LMX1214

 

  1.   1
  2.   Description
  3.   Features
  4.   Applications
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Hardware
    1. 2.1  Evaluation Setup Requirement
    2. 2.2  Connection Diagram
    3. 2.3  Power Requirements
    4. 2.4  How to Enable Full SPI Control
    5. 2.5  Reference Clock
    6. 2.6  Output Connections
    7. 2.7  Switch Information
    8. 2.8  Default Configuration
    9. 2.9  Divider Mode Example
    10. 2.10 Hybrid Mode: SPI and Pin Mode
  8. 3Software
    1. 3.1 Software Installation
    2. 3.2 Software Description
    3. 3.3 USB2ANY Interface
  9. 4Implementation Results
    1. 4.1 Evaluation Setup
      1. 4.1.1 Buffer and Divider Mode
  10. 5Hardware Design Files
    1. 5.1 Schematic
    2. 5.2 PCB Layout
      1. 5.2.1 PCB Layer Stack-Up
    3. 5.3 Bill of Materials
  11. 6Additional Information
    1. 6.1 Troubleshooting Guide
      1. 6.1.1 General Guidance
      2. 6.1.2 If Output Is Not Seen on CLKOUT
      3. 6.1.3 If Device Features Are Not Active
      4. 6.1.4 If Divider Frequency Is Not Accurate
    2. 6.2 Trademarks

2.5 Reference Clock

Connect the CLKINP SMA connector to a high-quality signal source such as an SMA100B signal generator. Both CLKIN inputs are terminated internally with 50Ω to AC-GND (that is, GND connection is formed by an internal capacitor), thus no external termination is required or recommended. The input can be driven differentially; for example, connect both CLKINP and CLKINN SMA connectors to a balun or a differential clock source.

The default EVM profile configures the device in buffer mode. The input frequency can be modified per the operating range of mode of operation desired. This EVM setup guide and related plots assume a 3200MHz input at CLKIN.

The EVM connections for the SYNC input are DC-coupled and provide internal 100Ω termination with several biasing options.

To evaluate SYNC mode it's critical to have a SYNC input source capable of consistently meeting the setup and hold requirements for a single cycle of the input clock. This can become very challenging at higher frequencies where setup and hold requirements can be < 50ps. Another device capable of picosecond precise timed pulses, such as LMX2820 or LMX2594, can be used as a reference input to both CLKIN and SYNC for evaluating these features.