SNIS232A
October 2023 – June 2024
ISOTMP35
PRODUCTION DATA
1
1
Features
2
Applications
3
Description
4
Pin Configuration and Functions
5
Specifications
5.1
Absolute Maximum Ratings
5.2
ESD Ratings
5.3
Recommended Operating Conditions
5.4
Thermal Information
5.5
Insulation Specification
5.6
Power Ratings
5.7
Safety-Related Certifications
5.8
Safety Limiting Values
5.9
Electrical Characteristics
5.10
Typical Characteristics
6
Detailed Description
6.1
Overview
6.2
Functional Block Diagram
6.3
Features Description
6.3.1
Integrated Isolation Barrier and Thermal Response
6.3.2
Analog Output
6.3.2.1
Output Accuracy
6.3.2.2
Output Voltage Linearity
6.3.2.3
Drive Capability
6.3.2.4
Common Mode Transient Immunity (CMTI)
6.3.3
Thermal Response
6.4
Device Functional Modes
7
Application and Implementation
7.1
Application Information
7.1.1
Output Voltage Linearity
7.1.2
Load Regulation
7.1.3
Start-Up Settling Time
7.1.4
Thermal Response
7.1.5
External Buffer
7.1.6
ADC Selection and Impact on Accuracy
7.1.7
Implementation Guidelines
7.1.8
PSRR
7.2
Typical Application
7.2.1
Design Requirements
7.2.2
Detailed Design Procedure
7.2.2.1
Insulation Lifetime
7.3
Power Supply Recommendations
7.4
Layout
7.4.1
Layout Guidelines
7.4.2
Layout Example
8
Device and Documentation Support
8.1
Documentation Support
8.1.1
Related Documentation
8.2
Receiving Notification of Documentation Updates
8.3
Support Resources
8.4
Trademarks
8.5
Electrostatic Discharge Caution
8.6
Glossary
9
Revision History
10
Mechanical, Packaging, and Orderable Information
5.2
ESD Ratings
VALUE
UNIT
V
(ESD)
Electrostatic discharge
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±2500
V
Charged-device model (CDM), per ANSI/ESDA/JEDEC JS-002
(2)
±1000
(1)
JEDEC document JEP155 states that 500V HBM allows safe manufacturing with a standard ESD control process.
(2)
JEDEC document JEP157 states that 250V CDM allows safe manufacturing with a standard ESD control process.