SNLA416A September   2022  – February 2024 DS90UB960-Q1 , HD3SS3212-Q1

 

  1.   1
  2.   Abstract
  3. 1Market Need
  4. 2Multiplexing FPD-Link Scheme
  5. 3Multiplexing Execution and Setup
  6. 4Implementation of Switching Protocol
  7. 5Assessing Impact on Signal Integrity
    1. 5.1 Return Loss
    2. 5.2 Insertion Loss
  8. 6Margin Analysis
  9. 7Conclusion
  10. 8References

Insertion Loss

The non-multiplexed configuration meets the requirements outlined by TI shown in red on Figure 6-4. However, the addition of the multiplexer increases the insertion loss by 0.4 dB, so the recommended PCB insertion loss is no longer met. The total channel insertion loss requirements between the serializer and deserializer are dependent on both the PCB and the cable assembly budget. As the insertion loss penalty for using a multiplexer is relatively small with regards to the overall cable budget guidance, the required insertion loss minimum value for the total channel can still be met by offsetting the cable loss budget by 0.4 dB. This measurement was taken using the same test setup described in Section 5.1, where CH3 and CH4 are connected to a multiplexer and CH1 and CH2 are non-multiplexed.

GUID-20220831-SS0I-CBCK-M6R8-MN3GJZQMXD5H-low.svgFigure 5-3 Channel Insertion Loss