SNLA417 January 2023 DP83TC812R-Q1 , DP83TC812S-Q1
Currently, the DP83TC812-Q1 always performs a hard reset after waking up from TC10 sleep so all the registers return to their default state.
The next generation 100BASET1 TI PHY features configuration of up to 20 registers immediately upon waking from sleep mode. This means that interval T7 and T8 are ignored entirely and the PHY can initiate link up with a link partner without waiting for configuration by the MCU. The sequence of events is shown in the following list: