SNLA425A february   2023  – june 2023 DS160PR1601 , DS320PR1601

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Access Methods
    1. 1.1 Typical PCIe x16 Lane to DS160PR1601 and DS320PR1601 Channel Mapping
    2. 1.2 Device Configuration Through External EEPROM
  5. 2Register Mapping
    1. 2.1 Share Registers
    2. 2.2 Channel Registers
  6. 3Equalization Control Settings
  7. 4CTLE Index and Flat Gain Selection Matrix
  8. 5Programming Examples
  9. 6References
  10. 7Revision History

2 Register Mapping

The DS160PR1601 and DS320PR1601 have two types of registers:

  • Share Registers – These registers can be accessed at any time and are used for device-level configuration, status read back, control, or to read back the device ID information.
  • Channel Registers – These registers are used to control and configure specific features for each individual channel. All channels have the same register set and can be configured independent of each other or configured as a group via broadcast writes to bank 0 or bank 1.