SNLA425A february   2023  – june 2023 DS160PR1601 , DS320PR1601

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Access Methods
    1. 1.1 Typical PCIe x16 Lane to DS160PR1601 and DS320PR1601 Channel Mapping
    2. 1.2 Device Configuration Through External EEPROM
  5. 2Register Mapping
    1. 2.1 Share Registers
    2. 2.2 Channel Registers
  6. 3Equalization Control Settings
  7. 4CTLE Index and Flat Gain Selection Matrix
  8. 5Programming Examples
  9. 6References
  10. 7Revision History

1 Access Methods

There are two ways to access the DS160PR1601 and DS320PR1601 registers. The two methods are:

  • Register control through the Serial Management Bus (SMBus/I2C)
  • Automatic configuration through an external EEPROM

The DS160PR1601 and DS320PR1601 consist of eight individual I2C addresses to configure all 16 lanes of the redriver. Each address pair configures 8 channels.

Table 1-1 DS160PR1601 and DS320PR1601 Address Mapping
x_ADDR1_x Pin Level x_ADDR0_x Pin Level Bank 0: Channels 0-3: 7-Bit Address [HEX] Bank 1: Channels 4-7: 7-Bit Address [HEX]
L0 L0 0x18 0x19
L0 L1 0x1A 0x1B
L0 L2 0x1C 0x1D
L0 L3 0x1E 0x1F
L0 L4 Reserved Reserved
L1 L0 0x20 0x21
L1 L1 0x22 0x23
L1 L2 0x24 0x25
L1 L3 0x26 0x27
L1 L4 Reserved Reserved
L2 L0 0x28 0x29
L2 L1 0x2A 0x2B
L2 L2 0x2C 0x2D
L2 L3 0x2E 0x2F
L2 L4 Reserved Reserved
L3 L0 0x30 0x31
L3 L1 0x32 0x33
L3 L2 0x34 0x35
L3 L3 0x36 0x37