SNLA431 January   2024 DP83TC812R-Q1 , DP83TC812S-Q1

 

  1.   1
  2.   Trademarks
  3. 1Preface
  4.   Notational Conventions
  5. 2Related Documentation
  6. 3Support Resources
  7. 4Troubleshooting the PHY Application
    1. 4.1  Schematic and Layout Checklist
    2. 4.2  Verify Successful Power-up of PHY
    3. 4.3  Peripheral Pin Checks
      1. 4.3.1 Probe the RESET_N pin
      2. 4.3.2 Probe the INH pin
      3. 4.3.3 Probe the CLKOUT pin
      4. 4.3.4 Probe the Serial Management Interface (MDC, MDIO) Pins
    4. 4.4  Register Dump Comparison
    5. 4.5  Verifying Strap Configurations
    6. 4.6  Check the MDI Signal
    7. 4.7  Link Up Failed Common Issues
    8. 4.8  Signal Quality Check
    9. 4.9  Power Up Timing
    10. 4.10 Loopback Testing
    11. 4.11 Debugging the MAC Interface
    12. 4.12 Verify Open Alliance PMA Compliance
    13. 4.13 Tools and References
      1. 4.13.1 DP83TC812 Register Access
      2. 4.13.2 DP83TC812 USB2MDIO Scripts
      3. 4.13.3 Extended Register Access
      4. 4.13.4 Software and Driver Debug on Linux
        1. 4.13.4.1 Commonly Seen Linux Terminal Outputs
  8. 5Conclusion

4.2 Verify Successful Power-up of PHY

The first obvious but often overlooked item is proper power being supplied to the PHY. Probe each of the four supply rails of the PHY to maintain that the voltages are within limits shown below.

Table 4-1 PHY Supply Voltage Specifications

Pin Number

Descriptions

 Min Typ Max Unit

VDDIO, VDDMAC

34, 22

IO Supply Voltage = 1.8V

1.62

1.8

1.98

V

IO Supply Voltage = 2.5V

2.25

2.5

2.75

IO Supply Voltage = 3.3V

2.97

3.3

3.63

VDDA

11

Core Supply Voltage

2.97

3.3

3.63

V

VSLEEP

7

Sleep Supply Voltage

2.97

3.3

3.63

V