SNLA443 December   2023 DP83869HM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1DP83869 Application Overview
  5. 2Troubleshooting the Application
    1. 2.1 Configuring Correct Operational Mode
    2. 2.2 Schematic and Layout Checklist
    3. 2.3 Component Checklist
    4. 2.4 Peripheral Pin Checks
      1. 2.4.1 Power Supplies
      2. 2.4.2 RBIAS Voltage and Resistance
      3. 2.4.3 Probe the XI Clock
      4. 2.4.4 Probe the RESET_N Signal
      5. 2.4.5 Probe the Strap Pins During Initialization
      6. 2.4.6 Probe the Serial Management Interface Signals (MDC, MDIO)
      7. 2.4.7 Probe the MDI Signals
    5. 2.5 Built-In Self Test with Various Loopback Modes
    6. 2.6 Debugging MAC Interface
      1. 2.6.1 RGMII
      2. 2.6.2 SGMII
  6. 3Operational Mode Clarification
    1. 3.1 Bridge Modes
    2. 3.2 Fiber Configuration
      1. 3.2.1 Fiber Registers
  7. 4Tools and References
    1. 4.1 DP83869HM Register Access
    2. 4.2 Extended Register Access
      1. 4.2.1 Read (No Post Increment) Operation
      2. 4.2.2 Write (No Post Increment) Operation
    3. 4.3 Software and Driver Debug on Linux
      1. 4.3.1 Common Terminal Outputs
  8. 5Summary
  9. 6References

Abstract

DP83869HM is a robust, fully-featured gigabit physical layer (PHY) transceiver. Understanding different modes of operation in DP83869 describes each mode of the DP83869HM in greater detail. This application note was created to help troubleshoot the DP83869HM in a design and to show what to look at in the event that the PHY is not working as intended.