SNLA443 December   2023 DP83869HM

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1DP83869 Application Overview
  5. 2Troubleshooting the Application
    1. 2.1 Configuring Correct Operational Mode
    2. 2.2 Schematic and Layout Checklist
    3. 2.3 Component Checklist
    4. 2.4 Peripheral Pin Checks
      1. 2.4.1 Power Supplies
      2. 2.4.2 RBIAS Voltage and Resistance
      3. 2.4.3 Probe the XI Clock
      4. 2.4.4 Probe the RESET_N Signal
      5. 2.4.5 Probe the Strap Pins During Initialization
      6. 2.4.6 Probe the Serial Management Interface Signals (MDC, MDIO)
      7. 2.4.7 Probe the MDI Signals
    5. 2.5 Built-In Self Test with Various Loopback Modes
    6. 2.6 Debugging MAC Interface
      1. 2.6.1 RGMII
      2. 2.6.2 SGMII
  6. 3Operational Mode Clarification
    1. 3.1 Bridge Modes
    2. 3.2 Fiber Configuration
      1. 3.2.1 Fiber Registers
  7. 4Tools and References
    1. 4.1 DP83869HM Register Access
    2. 4.2 Extended Register Access
      1. 4.2.1 Read (No Post Increment) Operation
      2. 4.2.2 Write (No Post Increment) Operation
    3. 4.3 Software and Driver Debug on Linux
      1. 4.3.1 Common Terminal Outputs
  8. 5Summary
  9. 6References

2.4.1 Power Supplies

The power supplies are the first key item to check. Power up the device and perform DC measurement of the supplies as close to the pin as possible. Confirm that each measurement is within the limits defined in the Recommended Operating Conditions section of the data sheet.

GUID-20221207-SS0I-TVLD-D95R-TZXGBBR59CKL-low.svg Figure 2-2 Two-Supply Configuration
GUID-20210304-CA0I-FHCK-T2R1-F5MGRD3DZMTG-low.svg Figure 2-3 Three-Supply Configuration

The DP83869 supports the two configurations for power supplies as shown in Figure 2-2 and Figure 2-3.

When operating in the three supply configuration, our recommendation is to power all supplies together. If powering all supplies simultaneously is not possible, then power VDD1P1 and VDD2P5 first with VDDIO and VDD1P8 following within 50 ms. Place 1-μF and 0.1-μF decoupling capacitors as close as possible to component VDD pins, placing the 0.1-μF capacitor closest to the pin.

When operating in the two supply configuration, leave both VDDA1P8 pins disconnected and power all supplies together. If powering all supplies simultaneously is not possible, then power VDDA2P5 and VDD1P1 first with VDDIO following within 50 ms. Place 1-μF and 0.1-μF decoupling capacitors as close as possible to component VDD pins, placing the 0.1-μF capacitor closest to the pin.