SNLA474A October   2024  – October 2024 DS90UB971-Q1

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1 Introduction
  5. 2 Typical Test Standards Overview
    1. 2.1 ISO 10605 Standard
    2. 2.2 Performance Status Categorization
  6. 3 FPD-Link Hardware Optimizations
    1. 3.1 Connector Grounding
    2. 3.2 PCB to Enclosure Grounding
    3. 3.3 MODE Selection
  7. 4 FPD-Link Software Optimizations
    1. 4.1 LOCK Detection Tuning
    2. 4.2 Parity Error Handling
    3. 4.3 Forward Error Correction
      1. 4.3.1 FEC Test Capabilities
  8. 5 Optimization Test Data
    1. 5.1 Baseline Hardware - No Software Optimization
    2. 5.2 Optimized Hardware - No Software Optimization
    3. 5.3 Optimized Hardware and Software
  9. 6 Example Scripts for Software Optimization
  10. 7 Additional System Level Software Options
  11. 8 Summary
  12. 9 References
  13. 10Revision History

Abstract

FPD-Link camera designs often undergo rigorous automotive EMC testing during OEM qualification. As camera systems in the vehicle have taken on greater responsibility within the vehicle's safety architecture, robustness requirements for those qualifications have become far more stringent as well. Many OEM customers demand error free performance under various high-stress electrical conditions including conducted interference, radiated interference, and even during ESD strikes to the modules, connectors, or cables. This application note can outline key design guidelines that an FPD-Link system designer can implement in both hardware and software design to maximize system level ESD performance.