SNLA475 October   2024 DS250DF410 , DS250DF810 , DS280BR810 , DS280BR820 , DS280DF810 , DS280MB810 , DS560MB410

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Codesign: 25GbE 4-Channel Retimer or Redriver with Crosspoint
    1. 2.1 DS250DF410 Retimer Overview
    2. 2.2 DS560MB410 Redriver Overview
    3. 2.3 Pin Comparison Table
    4. 2.4 Codesign Schematic Example
    5. 2.5 Notable Codesign Elements
      1. 2.5.1 Calibration Clock
      2. 2.5.2 SMBus Address
      3. 2.5.3 SMBus Controller Mode
      4. 2.5.4 SMBus Pull-Up Resistors
      5. 2.5.5 Interrupt Output
      6. 2.5.6 Mux Select Inputs
  6. 3Codesign: 25GbE 8-Channel Retimer or Redriver with Crosspoint
    1. 3.1 DS250DF810 and DS280DF810 Retimers Overview
    2. 3.2 DS280BR810, DS280BR820, and DS280MB810 Redrivers Overview
    3. 3.3 Pin Comparison Table
    4. 3.4 Codesign Schematic Example
    5. 3.5 Notable Codesign Elements
      1. 3.5.1 AC Coupling
      2. 3.5.2 Calibration Clock
      3. 3.5.3 SMBus Address
      4. 3.5.4 SMBus Controller Mode
      5. 3.5.5 SMBus Pull-Up Resistors
      6. 3.5.6 Interrupt Output
      7. 3.5.7 Mux Select Inputs
  7. 4Summary
  8. 5References

3.5.2 Calibration Clock

DS2x0DF810 requires a 25MHz (±100PPM) 2.5V single-ended clock from external oscillator to be connected to pin E1 (CAL_CLK_IN). A 25MHz oscillator Y1 is included in the codesign schematic example. Pin E15 (CAL_CLK_OUT) outputs a 2.5V buffered replica of the calibration clock input for connecting multiple devices in a daisy-chained fashion.

DS280BR8x0 and DS280MB810 do not require an external calibration clock. Pin E1 (CAL_CLK_IN) can optionally support a 25MHz input clock. Pin E15 (CAL_CLK_OUT) outputs a 2.5V buffered replica of the calibration clock input.

There are two options regarding calibration clock connections to DS280BR8x0 and DS280MB810 within this codesign example.

  1. Depopulate resistors R15 and R16 to disconnect the calibration clock input and output signals from the device.
  2. Keep R15 and R16 populated to buffer the 25MHz reference clock signal. This option is most useful if the reference clock is connected to multiple devices in a daisy-chained fashion.