SNLS648C February   2019  – August 2024 TUSB2E22

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 Electrical Characteristics
    6. 5.6 Switching Characteristics
    7. 5.7 Timing Requirements
  7. 6 Parametric Measurement Information
  8. 7 Detailed Description
    1. 7.1 Overview
    2. 7.2 Functional Block Diagram
    3. 7.3 Feature Description
      1. 7.3.1 USB 2.0
      2. 7.3.2 eUSB2
      3. 7.3.3 Cross MUX
    4. 7.4 Device Functional Modes
      1. 7.4.1 Repeater Mode
      2. 7.4.2 Power Down Mode
      3. 7.4.3 CROSS
  9. 8 Applications and Implementation
    1. 8.1 Application Information
    2. 8.2 Typical Dual Port System Implementation
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
      3. 8.2.3 Application Curve
    3. 8.3 Power Supply Recommendations
      1. 8.3.1 Power Up Reset
    4. 8.4 Layout
      1. 8.4.1 Layout Guidelines
      2. 8.4.2 Example YCG Layout For Application With No Cross MUX Function.
      3. 8.4.3 Example RZA Layout For Application With No Cross MUX Function
  10. 9 Device and Documentation Support
    1. 9.1 Documentation Support
      1. 9.1.1 Related Documentation
    2. 9.2 Receiving Notification of Documentation Updates
    3. 9.3 Support Resources
    4. 9.4 Trademarks
    5. 9.5 Electrostatic Discharge Caution
    6. 9.6 Glossary
  11. 10Revision History
  12. 11Mechanical, Packaging, and Orderable Information

8.3.1 Power Up Reset

RESETB pin is active low reset pin and can also be used as a power down pin.

TUSB2E22 does not have power supply sequence requirements between VDD3V3 and VDD1V8.

Maximum VDD3V3 and VDD1V8 ramp time to reach minimum supply voltages should be 2 ms.

Internal power on reset circuit along with the external RESETB input pin allows for proper initialization when RESETB is deasserted high prior to the power rails being valid. If RESETB deassert high before the power supplies are stable, internal power on reset circuit will hold off internal reset until the supplies are stable.

Upon deassertion of RESETB followed by internally generated reset signal and 1ms delay, CROSS pin is sampled and latched.

Upon deassertion of RESETB and after t_RH_READY, TUSB2E22 will enable and enter default state and be ready to accept eUSB2 packets. Each repeater will either be in host repeater mode or device repeater mode depending on the receipt of either host mode enable or peripheral mode enable.