SNLS696C April 2021 – July 2024 TSER953
PRODUCTION DATA
Several functional blocks include register sets contained in the Indirect Access map (Table 6-97); that is, Pattern Generator, and Analog controls. Register access is provided through an indirect access mechanism through the Indirect Access registers (IND_ACC_CTL, IND_ACC_ADDR, and IND_ACC_DATA). These registers are located at offsets 0xB0-0xB2 in the main register space.
The indirect address mechanism involves setting the control register to select the desired block, setting the register offset address, and reading or writing the data register. In addition, an auto-increment function is provided in the control register to automatically increment the offset address following each read or write of the data register.
For writes, the process is as follows:
If auto-increment is set in the IND_ACC_CTL register, repeating step 3 writes additional data bytes to subsequent register offset locations.
For reads, the process is as follows:
If auto-increment is set in the IND_ACC_CTL register, repeating step 3 reads additional data bytes from subsequent register offset locations.
| 0xB0[4:2] (IA_SEL) | PAGE/BLOCK | INDIRECT REGISTER PAGE DESCRIPTION |
|---|---|---|
| 000 | 0 | Pattern Generator |
| 001 | 1 | V3Link TX Registers |