SNLS745A November   2023  – April 2024 TDP2004

PRODUCTION DATA  

  1.   1
  2. 1 Features
  3. 2 Applications
  4. 3 Description
  5. 4 Pin Configuration and Functions
  6. 5 Specifications
    1. 5.1 Absolute Maximum Ratings
    2. 5.2 ESD Ratings
    3. 5.3 Recommended Operating Conditions
    4. 5.4 Thermal Information
    5. 5.5 DC Electrical Characteristics
    6. 5.6 High Speed Electrical Characteristics
    7. 5.7 SMBUS/I2C Timing Characteristics
    8. 5.8 Typical Characteristics
    9. 5.9 Typical Jitter Characteristics
  7. 6 Detailed Description
    1. 6.1 Overview
    2. 6.2 Functional Block Diagram
    3. 6.3 Feature Description
      1. 6.3.1 Linear Equalization
      2. 6.3.2 Flat-Gain
    4. 6.4 Device Functional Modes
      1. 6.4.1 Active Mode
      2. 6.4.2 Standby Mode
    5. 6.5 Programming
      1. 6.5.1 Pin mode
        1. 6.5.1.1 Five-Level Control Inputs
      2. 6.5.2 SMBUS/I2C Register Control Interface
        1. 6.5.2.1 Shared Registers
        2. 6.5.2.2 Channel Registers
      3. 6.5.3 SMBus/I 2 C Primary Mode Configuration (EEPROM Self Load)
  8. 7 Application and Implementation
    1. 7.1 Application Information
    2. 7.2 Typical Applications
      1. 7.2.1 DP 2.1 Mainlink Signal Conditioning
        1. 7.2.1.1 Design Requirements
        2. 7.2.1.2 Detailed Design Procedure
        3. 7.2.1.3 Application Curves
    3. 7.3 Power Supply Recommendations
    4. 7.4 Layout
      1. 7.4.1 Layout Guidelines
      2. 7.4.2 Layout Example
  9. 8 Device and Documentation Support
    1. 8.1 Receiving Notification of Documentation Updates
    2. 8.2 Support Resources
    3. 8.3 Trademarks
    4. 8.4 Electrostatic Discharge Caution
    5. 8.5 Glossary
  10. 9 Revision History
  11. 10Mechanical, Packaging, and Orderable Information

1 Features

  • Supports DisplayPort 2.1 up to 20Gbps - RBR, HBRx, UHBRx
  • Protocol agnostic linear equalizer supporting most AC coupled interfaces up to 20Gbps
  • Excellent electrical performance at 20Gbps (10GHz Nyquist):
    • 19dB equalization
    • 1.8V DC linearity, 1.08V AC linearity
    • –15 / –16dB Rx / Tx return loss
    • –60dB NEXT, –43dB FEXT cross talk
    • 70fs low additive RJ with PRBS data
  • Transparent to DisplayPort 1.4 and 2.1 link training
  • Single 3.3V supply with low active power: 160mW / channel
  • Internal voltage regulator provides immunity to supply noise
  • High linearity easing DP compliance ratio tests
  • High channel BW resulting excellent linear EQ curves
  • Pin-strap, I2C or EEPROM programming
    • 18 EQ boost settings
    • 5 flat gain settings
  • TDP2004: 0°C to 70°C commercial temperature
  • TDP2004I: –40°C to 85°C industrial temperature
  • 4mm × 6mm, 40 pin WQFN package