SNLU239A December   2018  – December 2023 DP83825I

 

  1.   1
  2.   DP83825EVM User’s Guide
  3.   Trademarks
  4. 1Definitions
  5. 2Introduction
    1. 2.1 Key Features
    2. 2.2 Operation – Quick Setup
      1. 2.2.1 Power Supply
      2. 2.2.2 LDO Supply
      3. 2.2.3 External Supply
      4. 2.2.4 EVM High Level Summary
  6. 3Configurations Options
    1. 3.1 Strap Options
  7. 4Software
    1. 4.1 MSP430 Driver
    2. 4.2 USB2MDIO Software
  8. 5Board Setup Details
    1. 5.1 Block Diagram
    2. 5.2 Schematics
  9. 6Bill of Materials
  10. 7Revision History

2 Introduction

The DP83825 is an ultra small form factor, very low power Ethernet Physical Layer transceiver with integrated PMD sublayers to support 10BASE-Te, 100BASE-TX Ethernet protocols. The DP83825 interfaces directly to twisted pair media via an external transformer. The DP83825 interfaces to the MAC layer through Reduced MII (RMII) both in Master and Slave mode. The 50 MHz clock in RMII Master mode is synchronized to MDI derived clock to improve the jitter in the system. The DP83825EVM demonstrates all features of DP83825 and supports 10BASE-Te and 100BASE-TX Ethernet protocols.