SNLU269 april 2023 SN75LVPE3410
The SN75LVPE3410 requires manual CTLE tuning. The CTLE gain level can be changed by modifying the value of each CTLE stage (EQ1 and EQ2) or by bypassing the EQ1 stage. The CTLE level may be set individually for each channel or broadcast to all channels. Table 3-3 shows an example sequence to set the CTLE gain level to 3.3dB at 4 GHz (CTLE Index 2: EQ1 = 001'b; EQ2 = 000'b).
Step | Register Set | Operation | Register Address [HEX] |
Register Value [HEX] |
Write Mask [HEX] |
Comment |
---|---|---|---|---|---|---|
1 | Share | Write | 0xFF | 0x03 | 0xFF | Select channel registers and enable broadcast write to all channels. |
2 | Share | Write | 0xFC | 0x01 | 0xFF | Select only register set channel 0 for read back. |
3 | Channel | Write | 0x04 | 0x00 | 0x01 | Disable EQ1 bypass. |
4 | Channel | Write | 0x03 | 0x01 | 0x07 | Set EQ1 to Index 1. |
5 | Channel | Write | 0x03 | 0x00 | 0x38 | Set EQ2 to Index 0. |
Table 3-4 gives a sub-sequence (Steps 3 - 5) to set a range of CTLE gain levels (CTLE Index 0 - 15). The sub-sequence should be preceded with the steps 1 and 2 as described in Table 3-3.
CTLE Index | CTLE Gain at 4 GHz (dB) | Step / Operation | Register Address [HEX] |
Register Value [HEX] |
Write Mask [HEX] |
---|---|---|---|---|---|
0 | -0.3 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x01 0x00 0x00 |
0x01 0x07 0x38 |
1 | 0.4 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x01 0x00 0x18 |
0x01 0x07 0x38 |
2 | 3.3 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x01 0x00 |
0x01 0x07 0x38 |
3 | 3.8 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x01 0x10 |
0x01 0x07 0x38 |
4 | 4.9 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x02 0x08 |
0x01 0x07 0x38 |
5 | 5.2 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x02 0x10 |
0x01 0x07 0x38 |
6 | 5.4 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x02 0x18 |
0x01 0x07 0x38 |
7 | 6.5 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x03 0x10 |
0x01 0x07 0x38 |
8 | 6.7 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x03 0x18 |
0x01 0x07 0x38 |
9 | 7.7 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x04 0x18 |
0x01 0x07 0x38 |
10 | 8.7 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x05 0x18 |
0x01 0x07 0x38 |
11 | 9.1 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x05 0x20 |
0x01 0x07 0x38 |
12 | 9.4 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x05 0x28 |
0x01 0x07 0x38 |
13 | 10.3 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x06 0x28 |
0x01 0x07 0x38 |
14 | 10.6 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x06 0x30 |
0x01 0x07 0x38 |
15 | 11.8 | 3 / Write 4 / Write 5 / Write |
0x04 0x03 0x03 |
0x00 0x07 0x38 |
0x01 0x07 0x38 |